FW80200M733SL678 Intel, FW80200M733SL678 Datasheet
FW80200M733SL678
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FW80200M733SL678 Summary of contents
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... Intel 80200 Processor based on Intel ™ XScale Microarchitecture Datasheet - Commercial and Extended Temperature (80200T) Product Features High Performance Processor based on I ® ™ Intel XScale Microarchitecture ® — 7-8 stage Intel Superpipelined Technology — 32-Entry Instruction Memory Management Unit — 32-Entry Data Memory Management Unit — ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. ...
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... Bus Signal Timings.................................................................................28 4.4.3 Boundary Scan Test Signal Timings ......................................................29 4.5 AC Timing Waveforms ........................................................................................30 4.6 Power Sequence .................................................................................................32 4.7 Reset Timing .......................................................................................................34 4.8 AC Test Conditions .............................................................................................34 4.9 Typical Power Dissipation ...................................................................................35 Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel ® ™ XScale Microarchitecture January 2003 3 ...
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... JTAG Pins ........................................................................................................... 16 6 241-Lead PBGA Pinout — Ballpad Number Order ............................................. 18 7 241-Lead PBGA Pinout — Signal Name Order .................................................. 20 8 Package Thermal Resistance — °C/Watt ........................................................... 22 9 Operating Conditions .......................................................................................... 24 10 Voltage Range Requirements for Intel 11 DC Characteristics .............................................................................................. Characteristics .............................................................................................. Input Clock Timings............................................................................................. 27 14 Output Timings.................................................................................................... 28 15 Input Timings ...
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... About this Document This is the Advance Information data sheet for the Intel microarchitecture (ARM* architecture compliant). This data sheet contains a functional overview, mechanical data (package signal locations and simulated thermal characteristics), targeted electrical specifications (simulated), and bus functional waveforms. Detailed functional descriptions other than parametric performance is published in the Intel ® ...
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... Intel 80200 Processor based on Intel Functional Overview • Performance Monitoring Unit furnishes two 32-bit event counters and one 32-bit cycle counter for analysis of hit rates, etc. • JTAG Debug Unit uses Hardware Breakpoints and 256-entry Trace History Buffer (for flow change messages) to debug programs • ...
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... Deep pipes promote high instruction execution rates only when a means exists to successfully predict the outcome of branch instructions. The Branch Target Buffer provides such a means. Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel ® ™ XScale Microarchitecture Functional Overview ...
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... Intel 80200 Processor based on Intel Functional Overview 2.2 Branch Target Buffer (BTB) Each entry of the 128-entry BTB contains the address of a branch instruction, the target address associated with the branch instruction, and a previous history of the branch being taken or not taken. The history is recorded as one of four states: strongly taken, weakly taken, weakly not-taken, or strongly not-taken ...
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... IMMU provide some control over an enabled i-cache. When a needed line (eight 32-bit words) is not present in the i-cache, the line is fetched (critical word first) from memory via a two-level-deep fetch queue. Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel ® ™ XScale Microarchitecture Functional Overview ...
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... Intel 80200 Processor based on Intel Functional Overview 2.6 Data Cache (D-Cache) The D-Cache can contain high-use data such as lookup tables and filter coefficients, allowing the core access to data at core frequencies. This prevents core stalls caused by multicycle accesses to external memory. The 32 KByte d-cache is 32-set/32-way associative, where each set contains 32-ways and each way contains a tag address, a cache line (32 bytes with one parity bit per byte) of data, two dirty bits (one for each of two 8-byte groupings in a line), and one valid bit ...
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... LSBs are added to the 40-bit accumulator. 16x32 versions of the multiply-accumulate instructions complete in a single cycle. Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel ® ™ XScale Microarchitecture Functional Overview ...
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... Test Access Port (TAP) controller, Boundary-Scan register, instruction and data registers, and dedicated signals TDI, TDO, TCK, TMS, and TRST#. The debug unit, when used with debugger application code running on a host system outside of the Intel allows a program running on the Intel application code or a debug exception to stop program execution and re-direct execution to a debug handling routine ...
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... Sleep modes; the output pins assume the state specified by Hld(...). Slp(...) While the Intel Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel 17. Description • Rst(1) Is driven to Vcc • Rst(0) Is driven to Vss • Rst(X) Is driven to unspecified state ( buses may contain a mix of 1 and 0 signals) • ...
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... Intel 80200 Processor based on Intel Package Information Table 3. Power Pins Name CCP V CCA Table 4. Signal Pin Description (Sheet Name A[15:0] ABORT ADS#/LEN[2] BE[7:0]# CLK CWF/ DBusWidth (Config. Pin) D[63:0] DCB[7:0] DVALID FIQ# HLDA 14 January 2003 ® ™ XScale Microarchitecture Count Positive supply for the core ...
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... When tied high, the initial clock multiplier is 6. When tied low, the initial clock multiplier is 3. This signal must be tied to a valid level at all times. When using the Intel 80312 I/O companion chip, this signal must be tied high. 2 ...
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... Intel 80200 Processor based on Intel Package Information Table 5. JTAG Pins Name TCK TDI TDO TRST# TMS 16 January 2003 ® ™ XScale Microarchitecture Count Type 1 I TEST CLOCK is an input which provides the clocking function for the IEEE 1149.1 Boundary Scan Testing (JTAG). State information and data are clocked into the component on the rising edge and data is clocked out of the component on the falling edge ...
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... Lead PBGA Package Figure 2. 241-Lead PBGA Package Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel ® ™ XScale Microarchitecture Package Information A8276-01 January 2003 17 ...
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... Intel 80200 Processor based on Intel Package Information Table 6. 241-Lead PBGA Pinout — Ballpad Number Order (Sheet Ball # Signal CCP DCB1 A5 DCB2 A6 DCB6 A7 BE0# A8 BE3# A9 BE5# A10 BE6# A11 LOCK A12 NC A13 RESETOUT# A14 PWRSTATUS0 A15 V SS A16 V CCP A17 V SS ...
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... V CCP M15 V SS M16 LOWVPP M17 TDI N1 D43 N2 V CCP N3 D44 CCP Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel Signal Ball # Signal CCP N11 V CC N12 V SS N13 V CCP N14 V SS N15 V SS N16 V SS N17 ...
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... Intel 80200 Processor based on Intel Package Information Table 7. 241-Lead PBGA Pinout — Signal Name Order (Sheet Signal A10 A11 A12 A13 A14 A15 ABORT BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# CLK CWF D10 D11 D12 D13 20 January 2003 ® ...
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... CCP V CCP V CCP V CCP V CCP V CCP V CCP V CCP V CCP V CCP V CCP V CCP Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel Ball # Signal Ball # L17 P17 M17 V N11 CC P15 K14 V R16 CC A16 A15 SS B11 V A17 B13 B16 SS C4 ...
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... Intel 80200 Processor based on Intel Package Information 3.2 Package Thermal Specifications 3.3 Package Thermal Resistance ® The Intel 80200 processor is specified for operation when T range of 0°C to 90°C (T environment to determine whether the device is within its specified operating range. The case temperature should be measured at the center of the top surface, opposite the pins. θ ...
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... Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel Temperatures 0.00 1.00 2.00 Total Power D issipation Case Temperature vs. Air Flow, Various Ambient Temperatures, Nominal Power Dissipation (1 W) 100 200 300 Air Flow (LFM) ® ™ XScale Microarchitecture ...
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... Do 0° 90°C not finalize a design with this information. Revised 2.1V SS information is published when the product wrt. V 5.0V becomes available. The specifications are subject SS to change without notice. Contact your local Intel wrt. V 2.1V SS representative before finalizing a design. –0 0.5 V CCP † ...
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... V Pin Requirements CCA To reduce voltage supply noise on the Intel Loop (PLL) circuit is isolated on the pinout. The lowpass filter, as shown in induced clock jitter and its effects on timing relationships in system designs. The trace lengths between the 4.7µF capacitor, the 0.01µF capacitor, and V possible ...
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... Intel 80200 Processor based on Intel Electrical Specifications 4.3 Targeted DC Specifications Table 11. DC Characteristics Symbol V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH C Input Capacitance IN C I/O or Output Capacitance OUT C CLK Capacitance CLK ...
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... T MCLK Low Time MCL T MCLK Rise Slew Rate MCR T MCLK Fall Slew Rate MCF NOTES: 1. See Figure 6 and 2. Not tested. Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel Parameter Min 33. 1.5 1 2.5 2.5 1.5 1.5 Figure 7. ® ...
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... Intel 80200 Processor based on Intel Electrical Specifications 4.4.2 Bus Signal Timings Table 14. Output Timings Symbol Output valid delay from MCLK -- T OV1 D[63:0], DCB, and BE# Output float delay from MCLK -- T OF1 D[63:0], DCB, and BE# Output Slew Rate -- D[63:0], T OS1 DCB, and BE# ...
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... Delay Input Setup to TCK — All Inputs T IS10 (Non-Test) Input Hold from TCK — All Inputs T IH8 (Non-Test) Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel Parameter Min Max 0.0 40.0 12.5 12.5 5.0 5.0 4.0 6.0 25 ...
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... Intel 80200 Processor based on Intel Electrical Specifications 4.5 AC Timing Waveforms Figure 6. CLK Waveform T Figure 7. MCLK Waveform T MCR 30 January 2003 ® ™ XScale Microarchitecture MCF T MCH T MCL T MC Datasheet - Commercial and Extended Temperature (80200T) 2.4V 1.5V 0.4V 2.4V 1.5V 0.4V ...
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... Figure 8. T Output Delay Waveform OV Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel 1.5V MCLK 1.5V T Max OVX Output 1.5V Valid ® ™ XScale Microarchitecture Electrical Specifications T Minimum OVX 1.5V January 2003 31 ...
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... Intel 80200 Processor based on Intel Electrical Specifications 4.6 Power Sequence Power must be supplied to the component’s pads (V components core (V show correct power sequences. Figure 9. Correct Power Sequence for V Figure 10. Another Correct Power Sequence for V Figure 11. Incorrect Power Sequence for V 32 January 2003 ® ...
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... CCA Figure 12. Preferred Power Sequence for VCC, VCCa Figure 13. Correct Power Sequence for VCC, VCCa Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel . Figure 12 shows the preferred method where V CCA Figure 13 shows the alternative. V and V ...
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... Intel 80200 Processor based on Intel Electrical Specifications 4.7 Reset Timing Figure 14 shows the sequence of pin states that may be assumed at processor reset. See the Intel 80200 Processor based on Intel information on reset timing. Figure 14. Pins’ State at Reset CLK MCLK RESET# RESETOUT# ...
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... Typical Core Power Dissipation 0.700 0.600 0.500 0.400 0.300 0.200 0.100 0.000 0.6 Datasheet - Commercial and Extended Temperature (80200T) ® Intel 80200 Processor based on Intel 1 Bus Speed vs. Power (M oderate Bus Ut ilization) 3.10 3.20 3.30 Vccp (Volts owe 0.7 0.8 0.9 1 1.1 Vcc (Volts) ® ...
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... Intel 80200 Processor based on Intel Electrical Specifications This Page Intentionally Left Blank 36 January 2003 ® ™ XScale Microarchitecture Datasheet - Commercial and Extended Temperature (80200T) ...