EE80C188XL12 Intel, EE80C188XL12 Datasheet - Page 42

• Manufacturer Part Number: EE80C188XL12
• Description: IC MPU 16BIT 5V 12MHZ 68PLCC
• Manufacturer: Intel

Specifications of EE80C188XL12

• Processor Type: 80C188
• Features: XL suffix, 16-Bit
• Speed: 12MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 864111

80C186XL 80C188XL
INSTRUCTION SET SUMMARY
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
42
DATA TRANSFER
MOV
Register to Register Memory
Register memory to register
Immediate to register memory
Immediate to register
Memory to accumulator
Accumulator to memory
Register memory to segment register
Segment register to register memory
PUSH
Memory
Register
Segment register
Immediate
PUSHA
POP
Memory
Register
Segment register
POPA
XCHG
Register memory with register
Register with accumulator
IN
Fixed port
Variable port
OUT
Fixed port
Variable port
XLAT
LEA
LDS
LES
LAHF
SAHF
PUSHF
POPF
Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers
e
e
e
e
e
e
e
Input from
e
e
e
e
e
e
e
Load EA to register
Load pointer to DS
Load pointer to ES
Pop
e
Output to
Move
e
Translate byte to AL
Load AH with flags
Store AH into flags
Pop flags
Push
Pop All
Exchange
Push flags
Push All
Function
1 0 0 0 1 0 0 w
1 0 0 0 1 0 1 w
1 1 0 0 0 1 1 w
1 0 1 0 0 0 0 w
1 0 1 0 0 0 1 w
1 0 0 0 0 1 1 w
1 1 1 0 0 1 0 w
1 1 1 0 1 1 0 w
1 1 1 0 0 1 1 w
1 1 1 0 1 1 1 w
1 0 1 1 w reg
1 0 0 0 1 1 1 0
1 0 0 0 1 1 0 0
1 1 1 1 1 1 1 1
0 1 0 1 0 reg
0 0 0 reg 1 1 0
0 1 1 0 1 0 s 0
0 1 1 0 0 0 0 0
1 0 0 0 1 1 1 1
0 0 0 reg 1 1 1
0 1 1 0 0 0 0 1
1 0 0 1 0 reg
1 1 0 1 0 1 1 1
1 0 0 0 1 1 0 1
1 1 0 0 0 1 0 1
1 1 0 0 0 1 0 0
1 0 0 1 1 1 1 1
1 0 0 1 1 1 1 0
1 0 0 1 1 1 0 0
1 0 0 1 1 1 0 1
0 1 0 1 1 reg
mod 0 reg r m
mod 0 reg r m
mod 1 1 0 r m
mod 0 0 0 r m
mod 000 r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
mod reg r m
(reg
addr-low
addr-low
data
data
port
port
i
01)
Format
data if w
data if s
(mod
(mod
addr-high
addr-high
data
i
i
11)
11)
e
e
0
1
data if w
e
1
80C186XL
Cycles
Clock
12 13
2 12
2 11
4 17
2 9
3 4
2 9
16
10
10
36
20
10
51
10
11
18
18
8
9
9
8
3
8
9
7
6
2
3
9
8
80C188XL
Cycles
Clock
12 13
2 12
2 13
2 15
4 17
2 9
3 4
20
14
13
14
68
24
14
12
83
10
15
26
26
13
12
8
9
3
8
9
7
6
2
3
Comments
8 16-bit
8 16-bit