MC68020RC20E Freescale Semiconductor, MC68020RC20E Datasheet - Page 173

• Manufacturer Part Number: MC68020RC20E
• Description: IC MICROPROCESSOR 32BIT 114-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68020RC20E

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 114-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 114
• Package Type: PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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When the main processor reads the empty/reset format word from memory during the
execution of the cpRESTORE instruction, it writes the format word to the restore CIR. The
main processor then reads the restore CIR and, if the coprocessor returns the empty/reset
format word, executes the next instruction. The main processor can then initialize the
coprocessor by writing the empty/reset format code to restore the CIR. When the
coprocessor receives the empty/reset format code, it terminates any current operations
and waits for the main processor to initiate the next coprocessor instruction. In particular,
after the cpRESTORE of the empty/reset format word, the execution of a cpSAVE should
cause the empty/reset format word to be returned when a cpSAVE instruction is executed
before any other coprocessor instructions. Thus, an empty/reset state frame consists only
of the format word and the following reserved word in memory (refer to Figure 7-14).
7.2.3.2.2 Not-Ready Format Word. When the main processor initiates a cpSAVE
instruction by reading the save CIR, the coprocessor can delay the save operation by
returning a not-ready format word. The main processor then services any pending
interrupts and reads the save CIR again. The not-ready format word delays the save
operation until the coprocessor is ready to save its internal state. The cpSAVE instruction
can suspend execution of a general or conditional coprocessor instruction; the
coprocessor can resume execution of the suspended instruction when the appropriate
state is restored with a cpRESTORE. If no further main processor services are required to
complete coprocessor instruction execution, it may be more efficient to complete the
instruction and thus reduce the size of the saved state. The coprocessor designer should
consider the efficiency of completing the instruction or of suspending and later resuming
the instruction when the main processor executes a cpSAVE instruction.
When the main processor initiates a cpRESTORE instruction by writing a format word to
the restore CIR, the coprocessor should usually terminate any current operations and
restore the state frame supplied by the main processor. Thus, the not-ready format word
should usually not be returned by the coprocessor during the execution of a cpRESTORE
instruction. If the coprocessor must delay the cpRESTORE operation for any reason, it
can return the not-ready format word when the main processor reads the restore CIR. If
the main processor reads the not-ready format word from the restore CIR during the
cpRESTORE instruction, it reads the restore CIR again without servicing any pending
interrupts.
7.2.3.2.3 Invalid Format Word. When the format word placed in the restore CIR to initiate
a cpRESTORE instruction does not describe a valid coprocessor state frame, the
coprocessor returns the invalid format word in the restore CIR. When the main processor
reads this format word during the cpRESTORE instruction, it sets the abort bit in the
control CIR and initiates format error exception processing.
A coprocessor usually should not place an invalid format word in the save CIR when the
main processor initiates a cpSAVE instruction. A coprocessor, however, may not be able
to support the initiation of a cpSAVE instruction while it is executing a previously initiated
cpSAVE or cpRESTORE instruction. In this situation, the coprocessor can return the
invalid format word when the main processor reads the save CIR to initiate the cpSAVE
instruction while either another cpSAVE or cpRESTORE instruction is executing. If the
7-20
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