LM4546BVHX/NOPB National Semiconductor, LM4546BVHX/NOPB Datasheet - Page 15

• Manufacturer Part Number: LM4546BVHX/NOPB
• Description: IC AUDIO CODEC 2MULTICH 48-LQFP
• Manufacturer: National Semiconductor
• Type: Audio Codec '97r

Specifications of LM4546BVHX/NOPB

• Data Interface: Serial
• Resolution (bits): 18 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 89
• Voltage - Supply, Analog: 4.2 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM4546BVHX

Functional Description
GENERAL
The LM4546B codec can mix, process and convert among
analog (stereo and mono) and digital (AC Link format) inputs
and outputs. There are two stereo and four mono analog
inputs and one stereo and one mono analog outputs. A
single codec supports data streaming on two input and two
output channels of the AC Link digital interface simulta-
neously.
ADC INPUTS AND OUTPUTS
Both stereo analog inputs and three of the mono analog
inputs can be selected for conversion by the 18-bit stereo
ADC. Digital output from the left and right channel ADCs is
always located in AC Link Input Frame slots 3 and 4 respec-
tively. Input level to either ADC channel can be muted or
adjusted from the Record Gain register, 1Ch. Adjustments
are in 1.5 dB steps over a gain range of 0 dB to +22.5 dB and
both channels mute together (D15). Input selection for the
ADC is through the Record Select Mux controlled from the
Record Select register, 1Ah, together with microphone se-
lection controlled by the MS bit (D8) in the General Purpose
register, 20h. The stereo input, CD_IN, uses a quasi-
differential 3-pin interface where both stereo channel inputs
are referenced to the third pin, CD_GND. CD_GND should
be AC coupled to the source ground and provides common-
mode feedback to cancel ground noise. It is not a DC
ground. The other stereo input, LINE_IN, is a 2-pin interface,
single-ended for each stereo channel with analog ground
(AV
microphone inputs can be muxed to a programmable boost
amplifier before selection for either channel of the ADC. The
Microphone Mux is controlled by the Microphone Selection
(MS) bit (D8) in the General Purpose register 20h and the 20
dB programmable boost is enabled by the 20dB bit (D6) in
register 0Eh. The other selectable mono input, coupled di-
rectly to the Record Select Mux, is PHONE.
ANALOG MIXING: MIX1
Three analog inputs are available for mixing at the stereo
mixer, MIX1 – both stereo and one mono, namely the micro-
phone input selected by MS (D8, reg 20h). Digital input to the
codec can be directed to either MIX1 or to MIX2 after con-
version by the 18-bit stereo DAC and level adjustment by the
PCM Out Volume control register (18h). Each input to MIX1
may be muted or level adjusted using the appropriate Mixer
Input Volume Register: Mic Volume (0Eh), Line_In Volume
(10h), CD Volume (12h) and PCM Out Volume (18h). The
mono microphone input is mixed equally into left and right
stereo channels but stereo mixing is orthogonal, i.e. left
channels are only mixed with other left channels and right
with right. The left and right amplitudes of any stereo input
may be adjusted independently however mute for a stereo
input acts on both left and right channels.
DAC MIXING AND 3D PROCESSING
Control of routing the DAC output to MIX1 or MIX2 is by the
POP bit (D15) in the General Purpose register, 20h. If MIX1
is selected (default, POP=0) then the DAC output is avail-
able for processing by the National 3D Sound circuitry. If
MIX2 is selected, the DAC output will bypass the 3D pro-
cessing. This allows analog inputs to be enhanced by the
analog 3D Sound circuitry prior to mixing with digital audio.
The digital audio may then use alternative digital 3D en-
hancements. National 3D Sound circuitry is enabled by the
3D bit (D13) in the General Purpose register, 20h, and is a
SS
) as the signals’ reference. Either of the two mono
15
fixed depth implementation. The 3D Control register, 22h, is
therefore not programmable (read-only). The 3D Sound cir-
cuitry defaults to disabled after reset.
ANALOG MIXING: MIX2
MIX2 combines the output of MIX1 (Stereo Mix 3D) with the
two mono analog inputs, PHONE and PC_BEEP; each are
each level-adjusted by the input control registers, Phone
Volume (0Ch) and PC_Beep Volume (0Ah), respectively. If
selected by the POP bit (D15, reg 20h), the DAC output is
also summed into MIX2.
STEREO MIX
The output of MIX2 is the signal, Stereo Mix. Stereo Mix is
used to drive the Line output (LINE_OUT) and can also be
selected as the input to the ADC by the Record Select Mux.
In addition, the two channels of Stereo Mix are summed to
form a mono signal (Mono Mix) also selectable by the
Record Select Mux as an input to either channel of the ADC.
STEREO OUTPUT
The output volume from LINE_OUT can be muted or ad-
justed by 0 dB to 45 dB in nominal 3 dB steps under the
control of the Master Volume register, 02h. As with the input
volume registers, adjustments to the levels of the two stereo
channels can be made independently but both left and right
channels share a mute bit (D15).
MONO OUTPUT
The mono output (MONO_OUT) is driven by one of two
signals selected by the MIX bit (D9) in the General Purpose
register, 20h. The signal selected by default (MIX = 0) is the
mono summation of the two channels of Stereo Mix 3D, the
stereo output of the mixer MIX1. Setting the control bit MIX =
1, selects a microphone input, MIC1 or MIC2. The choice of
microphone is controlled by the Microphone Select (MS) bit
(D8) also in the General Purpose register, 20h.
ANALOG LOOPTHROUGH AND DIGITAL LOOPBACK
Analog Loopthrough refers to an all-analog signal path from
an analog input through the mixers to an analog output.
Digital Loopback refers to a mixed-mode analog and digital
signal path from an analog input through the ADC, looped-
back (LPBK bit – D7, 20h) through the DAC and mixers to an
analog output. This is an 18 bit digital loopback, bypassing
the SRC logic, at a 48 kHz rate, even if another sample rate
conversion is selected.
RESETS
COLD RESET is performed when RESET# (pin 11) is pulled
low for
internal circuits are reset to their default state. It is the only
reset which clears the ATE and Vendor Test Modes.
WARM RESET is performed when SYNC (pin 10) is held
high for
powerdown (PR4 = 1, Powerdown Control / Status register,
26h). It is used to clear PR4 and power up the AC Link digital
interface but otherwise does not change the contents of any
registers nor reset any internal circuitry.
REGISTER RESET is performed when any value is written
to the RESET register, 00h. It resets all registers to their
default state and will modify circuit configurations accord-
ingly but does not reset any other internal circuits.
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1 µs and the codec AC Link digital interface is in
1 µs. It is a complete reset. All registers and
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