KSZ8873MLL Micrel Inc, KSZ8873MLL Datasheet - Page 13

• Manufacturer Part Number: KSZ8873MLL
• Description: IC ETHERNET SWITCH 3PORT 64-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8873MLL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• No. Of Ports: 3
• Ethernet Type: IEEE 802.3u
• Supply Current: 115mA
• Supply Voltage Range: 2.5V, 3.3V
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Svhc: No SVHC (15-Dec-2010)
• Base: RoHS Compliant
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Interface Type: MII, RMII
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3459

Micrel, Inc.
September 2010
Pin Number
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
INTRN
SCL_MDC
SDA_MDIO
P1ANEN
P1SPD
P1DPX
P1FFC
P3SPD
VDDIO
VDDCO
P1LED1
Pin Name
NC
GND
VDDC
NC
NC
GND
NC
Type
Opu
I/O
I/O
NC
Ipu/O
Ipu/O
Ipu/O
Gnd
P
Ipu/O
Ipd/O
NC
NC
P
Gnd
NC
Ipu/O
P
(1)
Description
Interrupt
Active Low signal to host CPU to indicate an interrupt status bit is set
when lost link. Refer to register 187 and 188.
SPI slave mode / I
I
MIIM clock input
I
MIIM: data input/out
Note: an external pull-up is needed on this pin when it is in use.
Unused pin. No external connection.
PD = disable auto-negotiation on port 1
PU = force port 1 to 100BT if P1ANEN = 0
PD = force port 1 to 10BT if P1ANEN = 0
PU = port 1 default to full duplex mode if P1ANEN = 1 and auto-
negotiation fails. Force port 1 in full-duplex mode if P1ANEN = 0.
PD = port 1 default to half duplex mode if P1ANEN = 1 and auto-
negotiation fails. Force port 1 in half duplex mode if P1ANEN = 0.
Digital ground
PU = always enable (force) port 1 flow control feature
PD = port 1 flow control feature enable is determined by auto negotiation
result.
PU = force port 3 to 10BT
PD = force port 3 to 100BT
Unused pin. No external connection.
Unused pin. No external connection.
3.3V, 2.5V or 1.8V digital VDD input power supply for IO with well
decoupling capacitors.
Digital ground
1.8V output pin provides power to both VDDA_1.8 and VDDC input pins.
Note: Internally 1.8V LDO regulator input comes from VDDIO. Do not
connect an external power supply to VDDCO pin. The ferrite bead is
requested between analog and digital 1.8V core power.
Unused pin. No external connection.
Port 1 LED Indicators:
Default: Speed (refer to register 195 bit[5:4])
Strap option: Port 3 flow control selection(P3FFC)
PU = always enable (force) port 3 flow control feature
PD = disable
SPI slave mode: serial data input
PU = enable auto-negotiation on port 1
1.8V digital core power input from VDDCO (pin 56).
1.8V core power voltage output (internal 1.8V LDO regulator output), this
2
2
C master mode: clock output
C master/slave mode: serial data input/output
13
2
C slave mode: clock input
KSZ8873MLL/FLL/RLL
M9999-092309-1.2