KSZ8873MLL Micrel Inc, KSZ8873MLL Datasheet - Page 57

IC ETHERNET SWITCH 3PORT 64-LQFP

KSZ8873MLL

Manufacturer Part Number
KSZ8873MLL
Description
IC ETHERNET SWITCH 3PORT 64-LQFP
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8873MLL

Data Rate
100Mbps
Controller Type
Ethernet Switch Controller
Interface
MII
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
No. Of Ports
3
Ethernet Type
IEEE 802.3u
Supply Current
115mA
Supply Voltage Range
2.5V, 3.3V
Digital Ic Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (15-Dec-2010)
Base
RoHS Compliant
Number Of Primary Switch Ports
3
Internal Memory Buffer Size
32
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
1.89/3.465V
Operating Temperature Classification
Commercial
Interface Type
MII, RMII
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3459

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8873MLL
Manufacturer:
Micrel Inc
Quantity:
1 934
Part Number:
KSZ8873MLL
Manufacturer:
ADI
Quantity:
27
Part Number:
KSZ8873MLL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873MLL
0
Part Number:
KSZ8873MLL AM
Manufacturer:
Micrel
Quantity:
1 638
Part Number:
KSZ8873MLL AM
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873MLL AM TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873MLLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8873MLLI
0
Part Number:
KSZ8873MLLJ
Manufacturer:
Micrel
Quantity:
323
Part Number:
KSZ8873MLLJ
Manufacturer:
Micrel Inc
Quantity:
10 000
Micrel, Inc.
Register 17 (0x11): Port 1 Control 1
Register 33 (0x21): Port 2 Control 1
Register 49 (0x31): Port 3 Control 1
Register 18 (0x12): Port 1 Control 2
Register 34 (0x22): Port 2 Control 2
Register 50 (0x32): Port 3 Control 2
September 2010
Bit
7
6
5
4
3
2-0
Bit
7
6
5
4
Sniffer Port
Receive
Sniff
Transmit
Sniff
Double Tag
User Priority
Ceiling
Port VLAN
membership
Enable 2
Queue Split
of Tx Queue
Ingress
VLAN
Filtering
Discard non
PVID
Packets
Force Flow
Control
Name
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
=1, Port is designated as sniffer port and will transmit packets that are
monitored.
=0, Port is a normal port
=1, All packets received on the port will be marked as “monitored
packets” and forwarded to the designated “sniffer port”
=0, No receive monitoring
=1, All packets transmitted on the port will be marked as “monitored
packets” and forwarded to the designated “sniffer port”
=0, No transmit monitoring
=1, All packets will be tagged with port default tag of ingress port
regardless of the original packets are tagged or not
=0, Do not double tagged on all packets
=1, If the packet’s “user priority field” is greater than the “user priority
field” in the port default tag register, replace the packet’s “user priority
field” with the “user priority field” in the port default tag register.
=0, Do not compare and replace the packet’s ‘user priority field”
Define the port’s egress port VLAN membership. The port can only
communicate within the membership. Bit 2 stands for port 3, bit 1 stands
for port 2, bit 0 stands for port 1.
An ‘1’ includes a port in the membership.
An ‘0’ excludes a port from membership.
Description
=1, Enable
It cannot be enable at the same time with split 4 queue at register 16,32
and 48 bit 0.
=0, Disable
=1,Tthe switch will discard packets whose VID port membership in
VLAN table bits [18:16] does not include the ingress port.
=0, No ingress VLAN filtering.
=1, The switch will discard packets whose VID does not match ingress
port default VID.
=0, No packets will be discarded
=1, Will always enable full duplex flow control on the port, regardless of
AN result.
=0, Full duplex flow control is enabled based on AN result.
57
KSZ8873MLL/FLL/RLL
Default
0
0
0
Pin value during
reset:
For port 1, P1FFC
pin
For port 2,
SMRXD30 pin
For port 3, this bit
has no meaning.
Flow control is set
by Reg. 6 bit 5.
Default
0
0
0
0
0
111
M9999-092309-1.2

Related parts for KSZ8873MLL