KSZ8873MLL Micrel Inc, KSZ8873MLL Datasheet - Page 50

• Manufacturer Part Number: KSZ8873MLL
• Description: IC ETHERNET SWITCH 3PORT 64-LQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8873MLL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: MII
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• No. Of Ports: 3
• Ethernet Type: IEEE 802.3u
• Supply Current: 115mA
• Supply Voltage Range: 2.5V, 3.3V
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Svhc: No SVHC (15-Dec-2010)
• Base: RoHS Compliant
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Interface Type: MII, RMII
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3459

Micrel, Inc.
Register Description
Global Registers (Registers 0 – 15)
Register 0 (0x00): Chip ID0
Register 1 (0x01): Chip ID1 / Start Switch
Register 2 (0x02): Global Control 0
September 2010
Bit
7-0
Bit
7-4
3-1
0
Bit
7
6
5
4
3
2
1
0
Start Switch
New Back-off
Enable
Rserved
Flush Dynamic
MAC Table
Flush Static
MAC Table
Pass Flow
Control Packet
Reserved
Reserved
Link Change
Age
Name
Family ID
Name
Chip ID
Revision ID
Name
R/W
RO
R/W
RO
RO
RW
R/W
R/W
RO
R/W
R/W
R/W
RO
RO
R/W
Description
Chip family
Description
0x3 is assigned to M series. (73M)
Revision ID
=1, start the switch (default)
0=, stop the switch
Description
New back-off algorithm designed for UNH
=1, Enable
=0, Disable
Rserved
=1, Enable flush dynamic MAC table for spanning tree application
=0, Disable
=1, Enable flush static MAC table for spanning tree application
=0, Disable
=1, Switch will pass 802.1x “flow control”
=0, Switch will drop 802.1x “flow control” packets
Reserved
Do not change the default value.
Reserved
Do not change the default value.
=1, Link change from “link” to “no link” will cause fast aging
(<800us) to age address table faster. After an age cycle is
complete, the age logic will return to normal aging (about 200 sec).
Note: If any port is unplugged, all addresses will be automatically
aged out.
50
packets
Default
0
0
0
0
0
0
0
0
Default
0x88
Default
0x3
-
1
KSZ8873MLL/FLL/RLL
M9999-092309-1.2