LAN9311-NU SMSC, LAN9311-NU Datasheet - Page 43

• Manufacturer Part Number: LAN9311-NU
• Description: IC ETHER SW 2PRT 16BIT 128-VTQFP
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9311-NU

• Controller Type: Ethernet Switch Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: 638-1076 - EVALUATION BOARD LAN9311-NU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1075

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
STRAP NAME
manual_FC_strap_1
auto_mdix_strap_2
manual_mdix_strap_2
autoneg_strap_2
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
DESCRIPTION
Port 1 Manual Flow Control Enable Strap: Configures the
default value of the
Select (MANUAL_FC_1)
Control Register
flow control is determined by auto-negotiation (if enabled),
and symmetric PAUSE is advertised (bit 10 of the
PHY Auto-Negotiation Advertisement Register
(PHY_AN_ADV_x)
When configured high, flow control is determined by the
Port 1 Full-Duplex Transmit Flow Control Enable
(TX_FC_1)
Enable (RX_FC_1)
advertised (bit 10 of the
Advertisement Register (PHY_AN_ADV_x)
Port 2 Auto-MDIX Enable Strap: Configures the default
value for the Auto-MDIX functionality on Port 2 when the
AMDIXCTL bit in the
Indication Register
(PHY_SPECIAL_CONTROL_STAT_IND_x)
When configured low, Auto-MDIX is disabled. When
configured high, Auto-MDIX is enabled.
Note:
Port 2 Manual MDIX Strap: Configures MDI(0) or MDIX(1)
for Port 2 when the auto_mdix_strap_2 is low and the
AMDIXCTL bit of the
Indication Register
(PHY_SPECIAL_CONTROL_STAT_IND_x)
Port 2 Auto Negotiation Enable Strap: Configures the
default value for the
in the PHY_BASIC_CTRL_2 register (See
Section
disabled. When configured high, auto-negotiation is
enabled.
This strap also affects the default value of the following bits:
Refer to the respective register definition sections for
additional information.
PHY_SPEED_SEL_LSB and PHY_DUPLEX bits of the
Port x PHY Basic Control Register
(PHY_BASIC_CONTROL_x)
10BASE-T Full Duplex (bit 6) and 10BASE-T Half Duplex
(bit 5) bits of the
Advertisement Register (PHY_AN_ADV_x)
MODE[2:0] bits of the
(PHY_SPECIAL_MODES_x)
14.4.2.1). When configured low, auto-negotiation is
If AMDIXCTL is set, this strap had no effect.
and
DATASHEET
Port 1 Full-Duplex Receive Flow Control
(MANUAL_FC_1). When configured low,
is set).
Port x PHY Auto-Negotiation
Port 1 Full-Duplex Manual Flow Control
bits, and symmetric PAUSE is not
Auto-Negotiation (PHY_AN)
Port x PHY Special Control/Status
Port x PHY Special Control/Status
Port x PHY Special Modes Register
43
Port x PHY Auto-Negotiation
bit in the
Port 1 Manual Flow
is cleared).
is cleared.
is cleared.
enable bit
Port x
PIN / DEFAULT
VALUE
0b
AUTO_MDIX_2
0b
1b
Revision 1.7 (06-29-10)