COM20020I3V-DZD SMSC, COM20020I3V-DZD Datasheet - Page 55

IC CTRLR LAN UNIV 2KX8 28-PLCC

COM20020I3V-DZD

Manufacturer Part Number
COM20020I3V-DZD
Description
IC CTRLR LAN UNIV 2KX8 28-PLCC
Manufacturer
SMSC
Series
ARCNETr
Datasheet

Specifications of COM20020I3V-DZD

Controller Type
ARCNET Controller
Interface
Differential
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
20mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1002-5

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5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Datasheet
SMSC COM20020I Rev D
AD0-AD2,
D3-D7
**
nCS
nDS
ALE
DIR
Note 1:
Note 2:
*
T
T
T
T
t10
t11
t12
t13
t14
ARB
ARB
ARB
opr
t1
t2
t3
t4
t5
t6
t7
t8
t9
is the period of operation clock. It depends on CKUP1 and CKUP0 bits
Figure 8.3 - Multiplexed Bus, 68XX-Like Control Signals; Write Cycle
is the Arbitration Clock Period
is identical to T
is twice T
Any cycle occurring after a write to Address Pointer Low Register requires a
minimum of 4T
next nDS.
Write cycle for Address Pointer Low Register occurring after an access to
Data Register requires a minimum of 5T
the leading edge of the next nDS.
Address Setup to ALE Low
The Microcontroller typically accesses the COM20020 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020 cycles.
Address Hold from ALE Low
nCS Setup to ALE Low
nCS Hold from ALE Low
ALE Low to nDS Low
Valid Data Setup to nDS High
Data Hold from nDS High
Cycle Time (nDS
DIR Setup to nDS Active
DIR Hold from nDS Inactive
ALE High Width
ALE Low Width
nDS Low Width
nDS High Width
opr
if SLOW ARB = 1
t11
t1
opr
VALID
t3
if SLOW ARB = 0
ARB
from the trailing edge of nDS to the leading edge of the
Parameter
to Next
t2,
t4
DATASHEET
t5
t9
)**
Page 55
ARB
from the trailing edge of nDS to
t12
VALID DATA
t13
t6
4T
min
10
10
20
20
20
20
30
10
20
10
10
10
15
ARB
*
max
t7
t10
t14
Note 2
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
t8**
t8
Revision 12-05-06

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