LM8333FLQ8X/NOPB National Semiconductor, LM8333FLQ8X/NOPB Datasheet - Page 10

IC KEYPAD CTLR 32-LLP

LM8333FLQ8X/NOPB

Manufacturer Part Number
LM8333FLQ8X/NOPB
Description
IC KEYPAD CTLR 32-LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM8333FLQ8X/NOPB

Controller Type
I/O Controller
Interface
ACCESS.bus, Microwire/SPI, USART, USB
Voltage - Supply
2.25 V ~ 2.9 V
Current - Supply
6mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LLP
For Use With
LM8333EVALKIT - BOARD EVALUATION LM8333
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM8333FLQ8X

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Every transfer is preceded by a Start condition (S) or a Re-
peated Start condition (RS). The latter occurs when a com-
mand follows immediately upon another command without an
intervening Stop condition (P). A Stop condition indicates the
end of transmission. Every byte is acknowledged (A) by the
receiver.
The first byte in a write from the host to the LM8333 is 0xA2,
and the first byte in a read is 0xA3. This byte is composed of
a 7-bit slave address in bits 7:1 and a direction bit in bit 0. The
direction bit is 0 on writes from the host to the slave and 1 on
reads from the slave to the host.
The second byte sends the command. The commands are
listed in
(0xD0) reads the interrupt code.
The slave address is repeated in the third byte, with the di-
rection bit set to 1. The Start (or Repeated Start) condition
must be repeated whenever the slave address or the direction
bit is changed. In this case, the direction bit is changed.
9.5 HOST READ COMMANDS
NOTE: All NSIDs perform as described in this section. NSID
LM8333GGR8AXS is an enhanced version which also allows
the use of a STOP START sequence in addition to the
REPEATED_START sequence described in this section.
Some host commands include one or more data bytes read
from the LM8333.
which consists of an address byte, a command byte, a second
address byte, and a data byte.
The first address byte is sent with the direction bit driven low
to indicate a write transaction of the command to the LM8333.
Table
5. In the example, the READ_INT command
Figure 9
shows a READ_INT command
FIGURE 8. Host Write Command
10
The data is sent from the slave to the host in the fourth byte.
When the master is the receiver, it sends a negative acknowl-
edgement (NA) to indicate the end of the data.
9.4 HOST WRITE COMMANDS
Some host commands include one or more data bytes written
to the LM8333.
which consists of an address byte, a command byte, and one
data byte.
The first byte is composed of a 7-bit slave address in bits 7:1
and a direction bit in bit 0. The state of the direction bit is 0 on
writes from the host to the slave and 1 on reads from the slave
to the host.
The second byte sends the command. The commands are
listed in
The third byte send the data, in this case configuring
GEN_IO_0 as an external interrupt input.
The second address byte is sent with the direction bit undriven
(pulled high) to indicate a read transaction of the data from
the LM8333.
The Repeated Start condition must be repeated whenever the
slave address or the direction bit is changed. In this case, the
direction bit is changed.
The data is sent from the slave to the host in the fourth byte.
This byte ends with a negative acknowledgement (NACK) to
indicate the end of the data.
Figure
9. The SET_EXT_INT command is 0xD1.
Figure 8
shows a SET_EXT_INT command,
20210610

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