USBN9603SLBX National Semiconductor, USBN9603SLBX Datasheet - Page 25

• Manufacturer Part Number: USBN9603SLBX
• Description: IC CTRLR FULL SPEED 28-LAMCSP
• Manufacturer: National Semiconductor

Specifications of USBN9603SLBX

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 30mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-Laminate CSP
• For Use With: USBN9604-HS-EB - KIT NODE CONTROLLER SAMPLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: USBN9603SLBX; USBN9603SLBX/NOPB; USBN9603SLBXTR

6.0 Functional Description
If two endpoints in the same direction are programmed with the same endpoint number and both are enabled, data is re-
ceived or transmitted to/from the endpoint with the lower number, until that endpoint is disabled for bulk or interrupt transfers,
or becomes full or empty for ISO transfers. For example, if receive EP2 and receive EP4 both use endpoint 5 and are both
isochronous, the first OUT packet is received into EP2 and the second OUT packet into EP4, assuming no firmware inter-
action inbetween. For ISO endpoints, this allows implementing a ping-pong buffer scheme together with the frame number
match logic.
Endpoints in different directions programmed with the same endpoint number operate independently.
Bidirectional Control Endpoint FIFO0 Operation
FIFO0 should be used for the bidirectional control endpoint zero. It can be configured to receive data sent to the default
address with the DEF bit in the EPC0 register. Isochronous transfers are not supported for the control endpoint.
The Endpoint 0 FIFO can hold a single receive or transmit packet with up to 8 bytes of data. Figure 20 shows the basic
operation in both receive and transmit direction.
Note: The actual current operating state is not directly visible to the user.
(*) For zero length packet, TX_EN causes a transition from IDLE to TXWAIT
TXFILL
TXWAIT
TX_EN Bit,
TXC0 Register (*)
Endpoint No.
Write to TXD0
IN token
0
1
2
3
4
5
6
FLUSH Bit TXC0 Register
Transmission
Done
Table 4. USBN9603/4 Endpoint FIFO Sizes
(Continued)
Size (Bytes)
Figure 20. Endpoint 0 Operation
TX
64
64
64
TX FIFO
TXFIFO1
TXFIFO2
TXFIFO3
IDLE
25
Name
FIFO0 Empty
(All Data Read)
8 FIFO0
FLUSH Bit, RXC0 Register
Size (Bytes)
SETUP Token
RX_EN Bit, RXC0 Register
64
64
64
RX FIFO
RX
RXFIFO1
RXFIFO2
RXFIFO3
Name
RXWAIT
OUT or
SETUP Token
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