TDA8002CT/B/C1,512 NXP Semiconductors, TDA8002CT/B/C1,512 Datasheet - Page 10

• Manufacturer Part Number: TDA8002CT/B/C1,512
• Description: IC INTERFACE CARD 28-SOIC
• Manufacturer: NXP Semiconductors

Specifications of TDA8002CT/B/C1,512

• Controller Type: Smart Card Interface
• Interface: Analog
• Voltage - Supply: 3 V ~ 6.5 V
• Current - Supply: 140mA
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3516-5; 935261651512; TDA8002C/BD

Philips Semiconductors
Table 1 Clock circuitry definition
Notes
1. X = don’t care.
2. In low-power mode.
3. f
I/O circuitry
The three I/O transceivers are identical. The state is HIGH
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to V
V
V
The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output), see Fig.8.
After a delay time t
present on the master side is transferred on the slave side.
When the input is back to HIGH level, a current booster is
turned on during the delay t
both sides are back to their idle state, ready to detect the
next logic 0 on any side.
1999 Oct 12
handbook, full pagewidth
DD
CC
IC card interface
, thus ensuring proper operation in the event that
int
LOW
MODE
V
= 32 kHz in low-power mode.
HIGH
HIGH
HIGH
HIGH
HIGH
DD
.
(2)
I/OUC
I/O
d
(between 50 and 400 ns), the logic 0
CLKSEL
HIGH
LOW
LOW
LOW
LOW
d
X
t d
on the output side and then
(1)
CC
and pin I/OUC to
Fig.8 Master and slave signals.
CLKDIV1
HIGH
HIGH
LOW
LOW
X
X
(1)
(1)
t d
10
In the event of a conflict, both lines may remain LOW until
the software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
200 kHz.
When CS is HIGH, I/OUC, AUX1UC and AUX2UC are
internally pulled-up to V
CS is LOW, I/OUC, AUX1UC and AUX2UC are
permanently HIGH (with integrated 100 k pull-up
resistors connected to V
CLKDIV2
HIGH
HIGH
LOW
LOW
X
X
(1)
(1)
t d
FREQUENCY OF
conflict
STOP low
STOP low
STROBE
DD
DD
1
1
CLK
1
4
2
with 20 k resistors. When
).
2
f
f
f
xtal
xtal
int
idle
MGD703
Product specification
TDA8002C
FREQUENCY OF
CLKOUT
1
1
2
f
f
f
f
f
2
xtal
xtal
xtal
xtal
int
f
int
(3)