PIC18F4550-I/PT Microchip Technology Inc., PIC18F4550-I/PT Datasheet - Page 166

• Manufacturer Part Number: PIC18F4550-I/PT
• Description: 44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4550-I/PT

• A/d Inputs: 13-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 34
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2455/2550/4455/4550
17.2
The operation of the USB module is configured and
managed through three control registers. In addition, a
total of 22 registers are used to manage the actual USB
transactions. The registers are:
• USB Control register (UCON)
• USB Configuration register (UCFG)
• USB Transfer Status register (USTAT)
• USB Device Address register (UADDR)
• Frame Number registers (UFRMH:UFRML)
• Endpoint Enable registers 0 through 15 (UEPn)
17.2.1
The USB Control register (Register 17-1) contains bits
needed to control the module behavior during transfers.
The register contains bits that control the following:
• Main USB Peripheral Enable
• Ping-Pong Buffer Pointer Reset
• Control of the Suspend mode
• Packet Transfer Disable
REGISTER 17-1:
DS39632C-page 164
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
USB Status and Control
USB CONTROL REGISTER (UCON)
Unimplemented: Read as ‘0’
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers not being reset
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
PKTDIS: Packet Transfer Disable bit
1 = SIE token and packet processing disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing enabled
USBEN: USB Module Enable bit
1 = USB module and supporting circuitry enabled (device attached)
0 = USB module and supporting circuitry disabled (device detached)
RESUME: Resume Signaling Enable bit
1 = Resume signaling activated
0 = Resume signaling disabled
SUSPND: Suspend USB bit
1 = USB module and supporting circuitry in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry in normal operation, SIE clock clocked at the configured rate
Unimplemented: Read as ‘0’
PPBRST
R/W-0
UCON: USB CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
SE0
R-x
PKTDIS
R/C-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
USBEN
R/W-0
In addition, the USB Control register contains a status
bit, SE0 (UCON<5>), which is used to indicate the
occurrence of a single-ended zero on the bus. When
the USB module is enabled, this bit should be moni-
tored to determine whether the differential data lines
have come out of a single-ended zero condition. This
helps to differentiate the initial power-up state from the
USB Reset signal.
The overall operation of the USB module is controlled
by the USBEN bit (UCON<3>). Setting this bit activates
the module and resets all of the PPBI bits in the Buffer
Descriptor Table to ‘0’. This bit also activates the
on-chip voltage regulator and connects internal pull-up
resistors, if they are enabled. Thus, this bit can be used
as a soft attach/detach to the USB. Although all status
and control bits are ignored when this bit is clear, the
module needs to be fully preconfigured prior to setting
this bit.
RESUME
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
SUSPND
R/W-0
U-0
—
bit 0