ST7540TR STMicroelectronics, ST7540TR Datasheet
ST7540TR
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ST7540TR Summary of contents
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... Bit header recognition ■ ST7537 and ST7538 compatible ■ UART/SPI host interface Order codes Part number ST7540 ST7540TR September 2006 FSK power line transceiver = 5mA) Description q The ST7540 is a Half Duplex synchronous/asynchronous FSK Modem designed for power line communication network applications ...
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Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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ST7540 7 Auxiliary analog and digital functions . . . . . . . . . . . . . . . . . . . . . . . . . 36 7.1 Band in use . . . ...
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Block diagram 1 Block diagram Figure 1. Block diagram 4/44 ST7540 ...
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ST7540 2 Pin settings 2.1 Pin connection Figure 2. Pin connection (top view) 2.2 Pin description Table 1. Pin description N° Name 1 CD_PD 2 REG_DATA 3 GND 4 RxD 5 RxTx 6 TxD 1 CD_PD 2 REG_DATA GND 3 ...
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Pin settings Table 1. Pin description (continued) N° Name 7 BU/THERM Digital/Output 8 CLR MCLK 11 RSTO 12 UART/SPI PA_IN- 15 PA_OUT PA_IN+ 19 TX_OUT SV ...
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ST7540 3 Electrical data 3.1 Maximum ratings Table 2. Absolute maximum ratings Symbol V Power supply voltage CC V Digital supply voltage DD SV /GND Voltage between Digital input voltage I V Digital output voltage O I ...
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Electrical data 3.3 Recommended operating conditions Table 4. Recommended operating conditions Symbol Max allowed slope during V CC Power-up Powered analog supply I(V ) Current with digital supply CC provided externally Maximum voltage Difference between ...
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ST7540 4 Electrical characteristics Table 5. Electrical characteristics ( V = +5V unless otherwise specified) Symbol V Digital supply voltages DD V Power supply voltage CC Digital input supply I current Power supply current current ...
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Electrical characteristics Table 5. Electrical characteristics (continued +5V unless otherwise specified) Symbol High logic level output V OH voltage Low logic level output V OL voltage Oscillator External Clock X2 voltage swing External Clock ...
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ST7540 Table 5. Electrical characteristics (continued +5V unless otherwise specified) Symbol V V SENSE impedance Current control loop CL reference threshold pin Hysteresis on current CL loop reference HYST threshold T ...
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Electrical characteristics Table 5. Electrical characteristics (continued +5V unless otherwise specified) Symbol Second harmonic HD2 PA_OUT distortion on PA_OUT Third harmonic HD3 distortion on PA_OUT PA_OUT pin Receiver Input sensitivity (Normal Mode) Input sensitivity ...
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ST7540 Table 5. Electrical characteristics (continued +5V unless otherwise specified) Symbol 5V Voltage regulator Linear regulator output VDC voltage 3.3V Voltage regulator Linear regulator output V DD voltage Other functions T Reset time RSTO ...
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Electrical characteristics Table 5. Electrical characteristics (continued +5V unless otherwise specified) Symbol Serial Interface Baud rate Bit Time T B (1/BAUD) Ts Setup time T Hold time H CLR/T vs. REG_DATA ...
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ST7540 5 Crystal resonator and external clock Figure 4. External clock waveform Figure 5. Crystal Resonator Crystal resonator and external clock D03IN1425A 15/44 ...
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Functional description 6 Functional description 6.1 Carrier frequencies ST7540 is a multi frequency device: eight programmable Carrier Frequencies are available (see Table 6). Only one Carrier can be used a time. The communication channel could be varied during the normal ...
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ST7540 6.3 Mark and space frequencies Mark and Space Communication Frequencies are defined by the following formula: F ("0") = FCarrier + [∆F]/2 F ("1") = FCarrier - [∆F]/2 ∆F is the Frequency Deviation. With Deviation = “0.5” the difference ...
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Functional description Table 8. ST7540 synthesized frequencies -- 600 1 0.5 1200 1 76 0.5 2400 1 0.5 4800 1 6.4 ST7540 Mains access ST7540 can access the Mains in two different ways: ● Synchronous access ● Asynchronous access The ...
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ST7540 6.5 Host processor interface ST7540 exchanges data with the host processor through a serial interface. The data transfer is managed by REG_DATA and RxTx Lines, while data are exchanged using RxD, TxD and CLR/T lines. Four are the ST7540 ...
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Functional description Figure 6. Synchronous and Asynchronous ST7540/Host Controller interfaces Host Controller ST7540 allows to interface the Host Controller using a five line interface (RxD,TxD,RxTx, CLR/T, & REG_DATA) in case of Synchronous mains access or using a 3 line interface ...
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ST7540 ● Synchronous mode: In Synchronous Mode ST7540 is always the master of the communication and provides the clock reference on CLR/T line. When ST7540 is in receiving mode an internal PLL recovers the clock reference. Data on RxD line ...
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Functional description 6.5.2 Control register access The communication with ST7540 Control Register is always synchronous. The access is achieved using the same lines of the Mains interface (RxD, TxD, RxTx and CLR/T) plus REG_DATA Line. With REG_DATA = 1 and ...
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ST7540 Figure 11. Data transmission CLR_T T B RxD REG_DATA RxTx TxD Figure 12. Data transmission CLR_T T B TxD REG_DATA RxTx RxD 6.6 Receiving mode The receive section is active when ...
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Functional description ● Receiving Sensitivity Level Selection It is possible to select the ST7540 Receiving Sensitivity Level by Control Register (see Table 12) or setting to ‘1’ the TxD pin during reception phase (this condition overcomes the control register setting ...
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ST7540 ● Carrier Detection The Carrier/Preamble detection Block notifies to the host controller the presence of a Carrier when it detects on the RX_IN Input a signal with an harmonic component close to the programmed Carrier Frequency. The CD_PD signal ...
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Functional description Figure 14. CD_PD Timing during RX CD_PD RX_IN RxD (UART/SPI="1") RxD (UART/SPI="0") Figure 15. Receiving path block diagram 6.7 Transmission mode The transmission mode is set when RxTx Pin =”0” and REG_DATA Pin =”0”. In transmitting mode the ...
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ST7540 In the analog domain, the signal is filtered in order to reduce the output signal spectrum and to reduce the harmonic distortion. The transition between a symbol and the following is done at the end of the on-going half ...
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Functional description The Current control loop acts to limit the maximum Peak Output current inside PA_OUT. The current control loop acts through the voltage control loop decreasing the Output Peak-to-Peak Amplitude to reduce the Current inside the Power Line Interface. ...
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ST7540 Table 11. V Vs. R1 & R2 resistors value OUT Vout (Vrms) 0.150 0.250 0.350 0.500 0.625 0.750 0.875 1.000 1.250 1.500 Note: Notes: The rate of R2 takes in account the input resistance on the V capacitor effect ...
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Functional description Figure 19. PA_OUT and Inputs and outputs of PA are available on pins PA_IN-,PA_IN+ and PA_OUT. User can easily select an appropriate active filtering topology to filter the signal present on TX_OUT pin. TX_OUT ...
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ST7540 Figure 20. Power line interface topology Figure 21. Power line interface startup timing diagram TX_OUT Vcc PA_IN- - PA_OUT + PA_IN+ TX_OUT ALC Vss Vsense VOLTAGE LOOP CL CURRENT LOOP RCL 80pF typ. D03IN1422 RxTx T T RXTX ST ...
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Functional description 6.8 Control register The ST7540 is a multi-channel and multifunction transceiver. An internal Bits (in Extended mode) Control Register allows to manage all the programmable parameters (Table 12). The programmable functions are: ● Channel Frequency ...
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ST7540 Table 12. Control register functions Function Frequencies 82.05 KHz 110 KHz 132.5 KHz Baud rate 5 Deviation 6 Watchdog Disabled Enabled (1.5 s) Disabled Transmission time out Not Used Frequency ...
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Functional description Table 12. Control register functions Function Preamble detection without conditioning Preamble detection with conditioning Detection method Carrier detection without conditioning Carrier detection with conditioning Mains Synchronous 14 Interfacing Asynchronous Mode 16 MHz ...
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ST7540 Table 12. Control register functions Function Header 20 Length Extended Disable (24 bits) 21 Register Enabled (48 bits) Sensitivity Normal Sensitivity 22 Mode High Sensitivity Disabled 23 Input Filter Enabled Frame from 0000h Header 40 ...
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Auxiliary analog and digital functions 7 Auxiliary analog and digital functions 7.1 Band in use The Band in Use Block has a Carrier Detection like function but with a different Input Sensitivity (83.5 dBµV Typ.) and with a different BandPass ...
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ST7540 7.3 Reset & watchdog RSTO Output is a reset generator for the application circuitry. During the ST7540 startup sequence is forced low. RSTO becomes high after a T startup sequence. Inside ST7540 is also embedded a watchdog function. The ...
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Auxiliary analog and digital functions 7.7 Under voltage lock out The UVLO function turns off the device if the V 340mV typically. 7.8 Thermal shutdown The ST7540 is provided of a thermal protection which turn off the PLI when the ...
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ST7540 Figure 24. Power-up sequence Voltage 5V/3. Auxiliary analog and digital functions Time D03IN1424 39/44 ...
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Auxiliary analog and digital functions Figure 25. Application schematic example with coupling transformer. 40/44 ST7540 ...
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ST7540 8 Mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the ...
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Mechanical data Table 13. HTSSOP28 Mechanical data Dim. Min 0.8 b 0.19 c 0.09 D (*) 9.6 D1 3.3 E 6.2 E1 (*) 4 aaa Figure 26. Package dimensions 42/44 ...
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ST7540 9 Revision history Table 14. Revision history Date 15-Mar-2006 25-Sep-2006 Revision 1 Initial release. 2 Updated Electrical Characteristics and Power Amplifier description Revision history Changes 43/44 ...
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