PIC16F1827-I/P Microchip Technology Inc., PIC16F1827-I/P Datasheet - Page 176

• Manufacturer Part Number: PIC16F1827-I/P
• Description: 18 PDIP .300in TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhance
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1827-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Standby Current (pic16lf182x): 30 nA @ 1.8 V, Typical
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC16(L)F1826/27
20.2
REGISTER 20-1:
TABLE 20-1:
DS41391D-page 176
CPSCON0
INTCON
OPTION_REG WPUEN
TMR0
TRISA
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by the Timer0 module.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/W-1/1
WPUEN
Name
*
Option and Timer0 Control Register
Page provides register information.
Timer0 Module Register
WPUEN: Weak Pull-up Enable bit
1 = All weak pull-ups are disabled (except MCLR, if it is enabled)
0 = Weak pull-ups are enabled by individual WPUx latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
TMR0CS: Timer0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
TMR0SE: Timer0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is not assigned to the Timer0 module
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
CPSON
TRISA7
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
INTEDG
Bit 7
R/W-1/1
GIE
OPTION_REG: OPTION REGISTER
Bit Value
INTEDG TMR0CS TMR0SE
TRISA6
000
001
010
011
100
101
110
111
PEIE
Bit 6
—
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
TMR0CS
R/W-1/1
Timer0 Rate
TMR0IE
TRISA5
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
Bit 5
—
TMR0SE
R/W-1/1
TRISA4
INTE
Bit 4
—
OSC
/4)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
CPSRNG1 CPSRNG0 CPSOUT
TRISA3
R/W-1/1
IOCIE
Bit 3
PSA
PSA
TMR0IF
TRISA2
Bit 2
PS2
R/W-1/1
TRISA1
INTF
Bit 1
 2011 Microchip Technology Inc.
PS1
PS<2:0>
R/W-1/1
TRISA0
T0XCS
IOCIF
Bit 0
PS0
R/W-1/1
Register
on Page
173*
318
177
122
86
bit 0