STM32W108CBU64TR STMicroelectronics, STM32W108CBU64TR Datasheet - Page 48

• Manufacturer Part Number: STM32W108CBU64TR
• Description: MCU, RF, 32BIT, 128K FLASH, 48VFQFPN
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32W108CBU64TR

• Controller Family/series: STM32
• Core Size: 32bit
• No. Of I/o's: 24
• Program Memory Size: 128KB
• Ram Memory Size: 8KB
• Cpu Speed: 24MHz
• Oscillator Type: Internal, External
• No. Of Timers: 2
• Rohs Compliant: Yes
• Applications: RF4CE, Remote Control
• Core Processor: ARM® Cortex-M3™
• Program Memory Type: FLASH (128 kB)
• Controller Series: STM32W
• Ram Size: 8K x 8
• Interface: I²C, SPI, UART/USART
• Number Of I /o: 24
• Voltage - Supply: 1.18 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System modules
48/209
31
15
31
15
30
14
30
14
Sleep timer interrupt mask register (INT_SLEEPTMRCFG)
Address:
Reset value:
Sleep timer clock source enables (SLEEPTMR_CLKEN)
This timer controls the low power clock gated modes.
Clearing CLKRC_EN before executing WFE with SLEEPDEEP bit set in the NVIC System
control register causes DEEP_SLEEP2 to be entered. Setting this bit causes
DEEP_SLEEP1 to be entered.
Address:
Reset value:
Bit 2 INT_ SLEEPTMR CMPB: Sleep timer compare B
Bit 1 INT_SLEEPTMRCMPA: Sleep timer compare A
Bit 0 INT_SLEEPTMRWRAP: Sleep timer overflow
Bit 1 SLEEPTMR_CLK10KEN: Enables 10kHz internal RC during deep
Bit 0 SLEEPTMR_CLK32KEN: Enables 32kHz external XTAL
29
13
29
13
Note: Bits are cleared when set to ‘1’.
Note: Bits are cleared when set to ‘1’.
28
12
28
12
27
11
27
11
0x4000 A054
0x0000 0000
0x4000 0008
0x0000 0002
26
10
26
10
25
Reserved
9
Reserved
25
9
r
Doc ID 16252 Rev 8
r
24
8
24
8
Reserved
Reserved
23
7
23
7
22
6
22
6
21
5
21
5
STM32W108CB, STM32W108HB
20
4
20
4
19
3
19
3
18
2
SLEEP
CMPB
INT_
TMR
18
rw
2
CLK10K
SLEEP
TMR_
EN
17
rw
1
SLEEP
CMPA
INT_
TMR
17
rw
1
CLK32K
SLEEP
TMR_
SLEEP
WRAP
EN
16
rw
INT_
TMR
0
16
rw
0