L5993 STMicroelectronics, L5993 Datasheet - Page 8

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L5993

Manufacturer Part Number
L5993
Description
Switching Converters, Regulators & Controllers Prog Current Mode
Manufacturer
STMicroelectronics
Datasheet

Specifications of L5993

Mounting Style
Through Hole
Package / Case
PDIP-16
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
L5993
Manufacturer:
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Quantity:
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Part Number:
L5993D
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L5993D013TR
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L5993
CONSTANT POWER FUNCTION
Pulse-by-pulse current limitation prevents peak
primary current from exceeding a given level.
This, in turn, limits the maximum power deliver-
able to the output or, in other words, the power
capability of a converter. The capability, however,
depends on switching frequency: for example, in
a discontinuous current mode flyback they are just
proportional.
In SMPS’ of raster-scanned CRT displays the
switching frequency is usually synchronized to the
raster line scan signal of the display in order to in-
crease noise immunity. More and more often,
CRT displays are required to operate within a
range of different video frequencies (e.g. from 31
kHz to 64 kHz), thus also the switching frequency
of the SMPS will vary in that range.
In case of some failure, the power throughput may
be excessive without necessarily tripping the
pulse-by-pulse current limitation circuit because of
a high operating frequency.
For the sake of safety, it would be then desirable
to design the power stage of a converter (power
MOSFET, transformer, catch diode) so as to be
able to withstand the maximum power throughput
under failure conditions. However, this is a con-
siderable increase of size and cost.
The ”Constant Power” function of the L5993 al-
lows to overcome this problem. The device
changes the threshold of its pulse-by-pulse cur-
rent limitation circuit so as to maintain fairly con-
stant the power capability of a flyback converter
despite the changes of the switching frequency.
This is accomplished by clamping the output of
the error amplifier (VCOMP) to a value which de-
creases as the frequency of the signal fed into pin
1 (SYNC) builds up.
The frequency-to-voltage conversion needed to
achieve this functionality is performed by detect-
ing the peak voltage of the (synchronized) oscilla-
tor with a peak-holding circuit. One external ca-
pacitor only is required.
It is important to point out that shape, amplitude
and duration of the synchronization pulses are of
no concern with this technique.
Figure 20. Sinchronizing the L5993.
8/22
SYNC
RCT
L5993
1
2
4
VREF
(a)
R
C
T
T
L5993
1
2
SYNC
RCT
R
OSC
(MASTER)
17
L4981A
18
16
C
OSC
SYNC
(b)
1
(SLAVE)
L5993
2
RCT
4
APPLICATION INFORMATION
Detailed Pin Functions Description
Pin 1. SYNC (In/Out Synchronization). This func-
tion allows the IC’s oscillator either to synchronize
other controllers (master) or to be synchronized to
an external frequency (slave).
As a master, the pin delivers positive pulses dur-
ing the falling edge of the oscillator (see pin 2). In
slave operation the circuit is edge triggered. Refer
to fig. 21 to see how it works. When several IC
work in parallel no master-slave designation is
needed because the fastest one becomes auto-
matically the master.
During the ramp-up of the oscillator the pin is
pulled low by a 600 A internal sink current gener-
ator. During the falling edge, that is when the
pulse is released, the 600 A pull-down is discon-
nected. The pin becomes a generator whose
source capability is typically 7mA (with a voltage
still higher than 3.5V).
In fig. 20, some practical examples of synchroniz-
ing the L5993 are given.
Pin 2. RCT (Oscillator). A resistor (R
pacitor (C
operating frequency f
C
3V, then is quickly internally discharged. As the
voltage has dropped to 1V it starts being charged
again.
The frequency can be established with the aid of
fig. 13 diagrams or considering the approximate
relationship:
where K
and is linked to the duration of the falling edge of
the sawtooth:
T
d
T
VREF
is charged through R
is also the duration of the sync pulses deliv-
R
C
T
T
T
K
f
osc
T
T
is defined as:
), connected as shown in fig. 21 set the
T
d
RCT
160 V
C
C
90, V
T
30 10
T
D97IN766B
R
2
(MASTER)
T
L5993
0.693
15
15
osc
4
-9
VREF
1
of the oscillator.
T
1
VREF
GND/OPEN
+ K
until its voltage reaches
SYNC
R
T
T
C
K
T
SYNC
(c)
T
(3)
T
R
) and a ca-
16 17
OSC
1
L4981A
(SLAVE)
2
18
C
OSC

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