EVAL-AD9837SDZ Analog Devices Inc, EVAL-AD9837SDZ Datasheet - Page 6

• Manufacturer Part Number: EVAL-AD9837SDZ
• Description: EVALUATION BOARD
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of EVAL-AD9837SDZ

• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Embedded: No
• Utilized Ic / Part: AD9837
• Primary Attributes: -
• Secondary Attributes: Graphical User Interface
• Kit Application Type: Clock & Timing
• Application Sub Type: Clock Generator
• Kit Contents: Software CD, USB Cable
• Silicon Manufacturer: Analog Devices
• Silicon Core Number: AD9837
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AD9837
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
COMP
VDD
CAP/2.5V
DGND
MCLK
SDATA
SCLK
FSYNC
AGND
VOUT
EP
Description
DAC Bias Pin. This pin is used for decoupling the DAC bias voltage.
Positive Power Supply for the Analog and Digital Interface Sections. The on-board 2.5 V regulator is also
supplied from VDD. VDD can have a value from 2.3 V to 5.5 V. A 0.1 μF and a 10 μF decoupling capacitor should
be connected between VDD and AGND.
The digital circuitry operates from a 2.5 V power supply. This 2.5 V is generated from VDD using an on-board
regulator when VDD exceeds 2.7 V. The regulator requires a decoupling capacitor of 100 nF typical, which is
connected from CAP/2.5V to DGND. If VDD is less than or equal to 2.7 V, CAP/2.5V should be tied directly to
VDD to bypass the on-board regulator.
Digital Ground.
Digital Clock Input. DDS output frequencies are expressed as a binary fraction of the frequency of MCLK. The
output frequency accuracy and phase noise are determined by this clock.
Serial Data Input. The 16-bit serial data-word is applied to this input.
Serial Clock Input. Data is clocked into the AD9837 on each falling edge of SCLK.
Active Low Control Input. FSYNC is the frame synchronization signal for the input data. When FSYNC is taken
low, the internal logic is informed that a new word is being loaded into the device.
Analog Ground.
Voltage Output. The analog and digital output from the AD9837 is available at this pin. An external load
resistor is not required because the device has a 200 Ω resistor on board.
Exposed Pad. Connect the exposed pad to ground.
CAP/2.5V
NOTES
1. CONNECT EXPOSED PAD
TO GROUND.
COMP
DGND
MCLK
VDD
Figure 4. Pin Configuration
Rev. 0 | Page 6 of 28
1
2
3
4
5
(Not to Scale)
AD9837
TOP VIEW
10
9
8
7
6
VOUT
AGND
FSYNC
SCLK
SDATA