LPC11C24FBD48/301,151 NXP Semiconductors, LPC11C24FBD48/301,151 Datasheet - Page 40

Microcontrollers (MCU) CAN Transceiver MCU 32K Flash

LPC11C24FBD48/301,151

Manufacturer Part Number
LPC11C24FBD48/301,151
Description
Microcontrollers (MCU) CAN Transceiver MCU 32K Flash
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC11C24FBD48/301,151

Processor Series
LPC11Cx4
Core
ARM Cortex-M0
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
8 KB
Interface Type
CAN, I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
OM13012,598
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
935294285151
NXP Semiconductors
LPC11CX2_CX4
Product data sheet
9.5 Peripheral power consumption
The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code is executed. Measured on a typical sample at T
noted otherwise, the system oscillator and PLL are running in both measurements.
The supply currents are shown for system clock frequencies of 12 MHz and 48 MHz.
Table 11.
Peripheral
IRC
System oscillator
at 12 MHz
Watchdog
oscillator at
500 kHz/2
BOD
Main PLL
ADC
CLKOUT
CT16B0
CT16B1
CT32B0
CT32B1
GPIO
IOCONFIG
I2C
ROM
SPI0
SPI1
UART
C_CAN
WDT
Power consumption for individual analog and digital blocks
All information provided in this document is subject to legal disclaimers.
Typical supply current in
mA
n/a
0.27
0.22
0.004
0.051
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 3 — 27 June 2011
12 MHz
-
-
-
-
0.21
0.08
0.12
0.02
0.02
0.02
0.02
0.23
0.03
0.04
0.04
0.12
0.12
0.22
0.03
0.02
48 MHz
-
-
-
-
-
0.29
0.06
0.06
0.07
0.06
0.88
0.13
0.15
0.45
0.45
0.82
0.1
0.06
0.47
0.10
Notes
System oscillator running; PLL off;
independent of main clock frequency.
IRC running; PLL off; independent of main
clock frequency.
System oscillator running; PLL off;
independent of main clock frequency.
Independent of main clock frequency.
Main clock divided by 4 in the CLKOUTDIV
register.
GPIO pins configured as outputs and set to
LOW. Direction and pin state are maintained if
the GPIO is disabled in the SYSAHBCLKCFG
register.
Main clock selected as clock source for the
WDT.
32-bit ARM Cortex-M0 microcontroller
LPC11Cx2/Cx4
amb
© NXP B.V. 2011. All rights reserved.
= 25 C. Unless
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