PCA9507D,112 NXP Semiconductors, PCA9507D,112 Datasheet - Page 8

• Manufacturer Part Number: PCA9507D,112
• Description: IC I/O EXPANDER I2C 24B 8SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9507D,112

• Interface: I²C, SMBus
• Number Of I /o: 24
• Interrupt Output: No
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935285823112; PCA9507D; PCA9507D

NXP Semiconductors
PCA9507_1
Product data sheet
According to
I
the internal driver on port B to turn on, causing port B to pull down to about 0.5 V. When
port B of the PCA9507 falls, first a CMOS hysteresis type input detects the falling edge
and causes the internal driver on port A to turn on and pull the port A pin down to ground.
In order to illustrate what would be seen in a typical application, refer to
Figure
If the bus master in
shown in
transmission except that the HIGH level may be as low as 2.7 V, and the turn on and turn
off of the acknowledge signals are slightly delayed.
The master drives the B bus to ground or lets it float to V
at the falling edge of the 8
SDAA on the A bus to ground, causing the PCA9507 to pull SDAB on the B bus to 0.5 V.
At the falling edge of the 9
the A bus.
Multiple PCA9507 port A sides can be connected in a star configuration
allowing all nodes to communicate with each other.
Multiple PCA9507s can be connected in series
to port B. I
number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
2
C-bus, a comparator detects the falling edge when it goes below 0.3V
12.
Figure 11
2
C-bus slave devices can be connected to any of the bus segments. The
Figure
would be observed on the A bus. This looks like a normal I
Figure 6
6, when port A of the PCA9507 is pulled LOW by a driver on the
Rev. 01 — 7 February 2008
2-wire serial bus extender for HDMI DDC I
th
th
clock, master releases SDAB on the B bus and slave pulls
clock, the master again drives the B bus and slave releases
were to write to the slave through the PCA9507, waveforms
(Figure
10) as long as port A is connected
CC(B)
as it sends data to the slave
2
PCA9507
C-bus and SMBus
© NXP B.V. 2008. All rights reserved.
CC(A)
Figure 11
(Figure
and causes
2
C-bus
9),
and
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