LMH0384SQE/NOPB National Semiconductor, LMH0384SQE/NOPB Datasheet - Page 6

• Manufacturer Part Number: LMH0384SQE/NOPB
• Description: IC ADAPT CBL EQUALIZER 16-LLP
• Manufacturer: National Semiconductor

Specifications of LMH0384SQE/NOPB

• Applications: Digital Interface
• Interface: SPI
• Voltage - Supply: 3.135 V ~ 3.465 V
• Package / Case: 16-LLP
• Mounting Type: Surface Mount
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Input Voltage: 3.3 V
• Supply Voltage (max): 3.45 V
• Supply Voltage (min): 3.15 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH0384SQETR

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Pin Descriptions – SPI Mode / SPI_EN = V
DAP
DAP
Pin
Pin
10
11
12
13
14
15
16
10
11
12
13
14
15
16
7
8
9
1
2
3
4
5
6
7
8
9
BYPASS
MUTE
V
SDO
SDO
AUTO SLEEP I, LVCMOS
V
MUTE
CD
V
V
V
SDI
SDI
SPI_EN
AEC+
AEC-
CD
MUTE
SS (SPI)
SDO
SDO
MISO (SPI)
V
SCK (SPI)
MOSI (SPI)
V
V
EE
CC
CC
EE
EE
CC
CC
EE
Name
Name
REF
REF
I, LVCMOS
I, Analog
I, LVCMOS
O, LVDS
O, LVDS
Power
I, LVCMOS
O, LVCMOS
Power
Ground
Ground
I, SDI
I, SDI
I, LVCMOS
I/O, Analog
I/O, Analog
O, LVCMOS
I, Analog
I, LVCMOS
O, LVDS
O, LVDS
O, LVCMOS
Power
I, LVCMOS
I, LVCMOS
Power
Ground
I/O, Type
I/O, Type
Equalization bypass. This pin has an internal pulldown.
H = Equalization is bypassed (no equalization occurs).
L = Normal operation.
Mute reference input. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTE
either unconnected or connected to ground for normal CD operation.
Connect this pin to ground or drive it logic low.
Serial data complement output.
Serial data true output.
Auto Sleep. AUTO SLEEP has precedence over MUTE and BYPASS. This pin has
an internal pullup.
H = Device will power down when no input is detected.
L = Normal operation (device will not enter auto power down).
Positive power supply (+3.3V).
Output mute. CD may be tied to this pin to inhibit the output when no input signal is
present. MUTE has precedence over BYPASS. This pin has an internal pulldown.
H = Outputs forced to a muted state.
L = Outputs enabled.
Carrier detect.
H = No input signal detected.
L = Input signal detected.
Positive power supply (+3.3V).
Connect exposed DAP to negative power supply (ground).
Description
Negative power supply (ground).
Serial data true input.
Serial data complement input.
SPI register access enable. This pin has an internal pulldown.
H = SPI register access mode.
L = Pin mode.
AEC loop filter external capacitor (1µF) positive connection.
AEC loop filter external capacitor (1µF) negative connection.
Carrier detect.
H = No input signal detected.
L = Input signal detected.
Mute reference input. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTE
either unconnected or connected to ground for normal CD operation.
SPI slave select. This pin has an internal pullup.
Serial data complement output.
Serial data true output.
SPI Master Input / Slave Output. LMH0384 data transmit.
Positive power supply (+3.3V).
SPI serial clock input.
SPI Master Output / Slave Input. LMH0384 data receive.
Positive power supply (+3.3V).
Connect exposed DAP to negative power supply (ground).
6
CC
Description
REF
REF
may be
may be