PCA9549D,118 NXP Semiconductors, PCA9549D,118 Datasheet
PCA9549D,118
Specifications of PCA9549D,118
935282229118
PCA9549D-T
PCA9549D-T
Related parts for PCA9549D,118
PCA9549D,118 Summary of contents
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PCA9549 Octal bus switch with individually I Rev. 02 — 13 July 2009 1. General description The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlled by the I with minimal propagation delay. Any individual ...
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... NXP Semiconductors 3. Ordering information Table 1. Type number PCA9549D PCA9549PW PCA9549BS 3.1 Ordering options Table 2. Type number PCA9549D PCA9549PW PCA9549BS 4. Block diagram RESET SCL SDA Fig 1. PCA9549_2 Product data sheet Octal bus switch with individually I Ordering information Package Name Description SO24 plastic small outline package; 24 leads; ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning RESET Fig 2. Fig 4. PCA9549_2 Product data sheet Octal bus switch with individually SDA 3 22 SCL PCA9549D 002aaa992 Pin configuration of SO24 terminal 1 index area Transparent top view Pin configuration of HVQFN24 (transparent top view) Rev. 02 — 13 July 2009 ...
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... NXP Semiconductors 5.2 Pin description Table 3. Symbol A0 A1 RESET SCL SDA V DD [1] HVQFN24 package die supply ground is connected to both the and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...
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... NXP Semiconductors 6. Functional description 6.1 Device addressing Following a START condition, the bus master must output the address of the slave it is accessing. The address of the PCA9549 is shown in internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. ...
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... NXP Semiconductors Table 4. Write = channel selection; read = channel status [1] Several bits can be enabled at the same time. For example means that bit 8, bit 6, bit 5, bit 2, and bit 1 are disabled and bit 7, bit 4, and bit 3 are enabled. 6.3 RESET input The RESET input is an active LOW signal which may be used to recover from a bus fault condition ...
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... NXP Semiconductors (1) maximum. (2) typical. (3) minimum. Fig 7. Figure 7 PCA9549 is only tested at the points specified in order for the PCA9549 to act as a voltage translator, the V or lower than the lowest bus voltage. For example, if the main bus was running and the downstream buses were 3.3 V and 2.7 V, then V to effectively clamp the downstream bus voltages ...
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... NXP Semiconductors 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 10. System configuration 7.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...
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... NXP Semiconductors 7.4 Bus transactions Data is transmitted to the PCA9549 control register using the Write mode as shown in Figure 12. SDA Fig 12. Write control register Data is read from the PCA9549 using the Read mode as shown in SDA Fig 13. Read control register 8. Limiting values Table 5. In accordance with the Absolute Maximum Rating System (IEC 60134). ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage ...
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... NXP Semiconductors Table 7. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...
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... NXP Semiconductors 10. Dynamic characteristics Table 8. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t LOW period of the SCL clock LOW t HIGH period of the SCL clock ...
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... NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 14. Definition of timing on the I SCL SDA RESET 50 % Fig 15. Definition of RESET timing PCA9549_2 Product data sheet Octal bus switch with individually HD;DAT HIGH SU;DAT 2 C-bus START rec(rst) Rev. 02 — 13 July 2009 PCA9549 ...
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... NXP Semiconductors 11. Application information C-bus/SMBus MASTER Remark: B can also be input and A can also be output as shown in bit 8. Fig 16. Typical application Fig 17. Custom multiplexer or demultiplexer application PCA9549_2 Product data sheet Octal bus switch with individually SDA SDA SCL SCL RESET PCA9549 A2 A1 ...
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... NXP Semiconductors Fig 18. 2 channel 4-to-1 multiplexer or demultiplexer 12. Test information Fig 19. Test circuit PCA9549_2 Product data sheet Octal bus switch with individually PULSE GENERATOR C = load capacitance includes jig and probe capacitance load resistance termination resistance; should be equal Rev. 02 — 13 July 2009 ...
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... NXP Semiconductors 13. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 0.85 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 23. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 15. Abbreviations Table 11. Acronym CBT CDM DUT ESD HBM 2 I C-bus MM PCB SMBus TTL PCA9549_2 ...
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... Release date PCA9549_2 20090713 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 8 “Dynamic – Symbol t – Symbol C • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Device addressing . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 5 6.3 RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.4 Power-on reset ...