TJA1081TS,112 NXP Semiconductors, TJA1081TS,112 Datasheet

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TJA1081TS,112

Manufacturer Part Number
TJA1081TS,112
Description
IC TXRX FLEXRAY 16SSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TJA1081TS,112

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
16-SSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935287496112
1. General description
2. Features and benefits
2.1 Optimized for time triggered communication systems
2.2 Low power management
The TJA1081 is a FlexRay node transceiver that is fully compliant with the FlexRay
electrical physical layer specification V2.1 Rev. A (see
features and parameters included in V3.0.1 (see
intended for communication systems from 1 Mbit/s to 10 Mbit/s, and provides an
advanced interface between the protocol controller and the physical bus in a FlexRay
network.
The TJA1081 features enhanced low-power modes, optimized for ECUs that are
permanently connected to the battery.
The TJA1081 provides differential transmit capability to the network and differential
receive capability to the FlexRay controller. It offers excellent EMC performance as well as
high ESD protection.
The TJA1081 actively monitors system performance using dedicated error and status
information (that can be read by any microcontroller), along with internal voltage and
temperature monitoring.
The TJA1081 supports mode control as used in the TJA1080A (see
TJA1081
FlexRay node transceiver
Rev. 4 — 24 February 2011
Compliant with FlexRay electrical physical layer specification V2.1 Rev. A (see
Automotive product qualification in accordance with AEC-Q100
Data transfer up to 10 Mbit/s
Support of 60 ns minimum bit time
Very low ElectroMagnetic Emission (EME) to support unshielded cable
Differential receiver with wide common-mode range for high ElectroMagnetic Immunity
(EMI)
Auto I/O level adaptation to host controller supply voltage V
Can be used in 14 V and 42 V powered systems
Instant shut-down interface (via BGE pin)
Independent power supply ramp-up for V
Low power management including inhibit switch
Very low current in Sleep and Standby modes
BAT
, V
Ref. 2
CC
and V
Ref.
and
1). In addition, it incorporates
IO
Section
IO
Product data sheet
14). It is primarily
Ref.
3).
Ref.
1)

Related parts for TJA1081TS,112

TJA1081TS,112 Summary of contents

Page 1

TJA1081 FlexRay node transceiver Rev. 4 — 24 February 2011 1. General description The TJA1081 is a FlexRay node transceiver that is fully compliant with the FlexRay electrical physical layer specification V2.1 Rev. A (see features and parameters included in ...

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... NXP Semiconductors Local and remote wake-up Supports remote wake-up via dedicated data frames Wake-up source recognition 2.3 Diagnosis (detection and signalling) Overtemperature detection Short-circuit on bus lines V BAT Pin TXEN and pin BGE clamping Undervoltage detection on pins V Wake source indication 2.4 Protection Bus pins protected against ± ...

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... NXP Semiconductors 4. Block diagram TXD 5 TXEN 7 BGE 8 STBN RXD 10 ERRN 9 RXEN V BAT 12 WAKE Fig 1. Block diagram TJA1081 Product data sheet TJA1081 SIGNAL ROUTER INPUT VOLTAGE ADAPTATION RXDINT OUTPUT VOLTAGE STATE ADAPTATION MACHINE WAKE-UP DETECTION OSCILLATOR UNDERVOLTAGE DETECTION 13 GND All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 2. 5.2 Pin description Table 2. Symbol Pin INH TXD TXEN RXD BGE STBN RXEN ERRN V BAT WAKE GND TJA1081 Product data sheet 1 INH TXD 4 TXEN 5 6 RXD 7 BGE STBN 8 Pin configuration Pin description Type Description ...

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... NXP Semiconductors 6. Functional description The block diagram of the transceiver is shown in 6.1 Operating modes The TJA1081 supports the following operating modes: • Normal (normal-power mode) • Receive-only (normal-power mode) • Standby (low-power mode) • Go-to-sleep (low-power mode) • Sleep (low-power mode) 6.1.1 Bus activity and idle detection ...

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... NXP Semiconductors TXD BGE TXEN BP BM RXEN RXD Fig 3. Timing diagram in Normal mode Fig 4. The state diagram is shown in TJA1081 Product data sheet receive normal 0.7V STBN t det(EN) t d(STBN-stb ERRN Timing diagram of control pins EN and STBN Figure 5. All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors RECEIVE ONLY 15, 25, 42 17 (1) At the first battery connection the transceiver will enter the Standby mode. Fig 5. State diagram The state transitions are represented with numbers, which correspond with the numbers in column 3 of TJA1081 Product data sheet 1 STBN = HIGH ...

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Table 4. State transitions forced by EN and STBN → indicates the action that initiates a transaction; 1 Transition Direction to Transition Pin from mode mode number STBN Normal Receive-only 1 H → L Go-to-sleep 2 → L Standby 3 ...

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Table 5. State transitions forced by a wake-up → indicates the action that initiates a transaction; 1 Transition Direction to Transition Pin from mode mode number STBN Standby Normal 16 H Receive-only 17 H Go-to-sleep 18 L Standby 19 L ...

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Table 6. State transitions forced by an undervoltage condition → indicates the action that initiates a transaction; 1 Transition from Direction to Transition mode mode number Normal Sleep 28 Sleep 29 Standby 30 Receive-only Sleep 31 Sleep 32 Standby 33 ...

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Table 7. State transitions forced by an undervoltage recovery → → indicates the action that initiates a transaction; Transition Direction to Transition Pin from mode mode number STBN Standby Normal 38 H Receive-only 39 H Sleep Normal 40 H Normal ...

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... NXP Semiconductors 6.2.1 Normal mode In Normal mode the transceiver is able to transmit and receive data via the bus lines BP and BM. The output of the normal receiver is directly connected to pin RXD. Transmitter behavior in Normal mode, with no time-out present on pins TXEN and BGE and the temperature flag not set (TEMP HIGH = 0; see In this mode, pin INH is set HIGH ...

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... NXP Semiconductors The undervoltage flags will be reset when the wake flag is set, and the transceiver will enter the mode indicated by the levels on pins EN and STBN if V 6.3 Wake-up mechanism From Sleep mode (pin INH is switched off), the transceiver will enter Standby or Go-to-sleep mode (depending on the level at pin EN) if the wake flag is set ...

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... NXP Semiconductors V dif 130 ns +1500 0 V −1500 770 870 870 μs Each interruption is 130 ns. The transition time from DATA_0 to DATA_1 and from DATA_1 to DATA_0 is about 20 ns. The TJA1081 wake-up flag will be set with the following pattern: FFh, FFh, FFh, FFh, FFh, 00h, 00h, 00h, 00h, 00h, ...

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... NXP Semiconductors 6.4 Fail-silent behavior In order to be fail silent, undervoltage detection and a reset mechanism for the digital state machine are implemented undervoltage is detected on pins V low-power mode. This ensures the passive and defined behavior of the transmitter and receiver when an undervoltage is detected. In the range between the minimum operating voltage and the undervoltage detection threshold, the principle functions of the transmitter and receiver are maintained ...

Page 16

... NXP Semiconductors 6.5.2 Remote wake-up source flag The remote wake-up source flag can only be set in a low-power mode if pin V its operating range. When a remote wake-up event is detected on the bus lines (see Section reset by entering a low-power mode. 6.5.3 Wake flag The wake flag is set if one of the following events occurs: • ...

Page 17

... NXP Semiconductors The error flag is reset if the data on the bus lines (pins BP and BM) are the same as on pin TXD or if the transmitter is disabled. No action will be taken if the bus error flag is set. 6.5.9 UV VBAT The UV is reset if the voltage is higher than V Section 6 ...

Page 18

... NXP Semiconductors Table 9. Status bits …continued Bit number Status bit S10 UVVIO S11 - S12 - STBN EN ERRN Fig 9. Timing diagram for status bits TJA1081 Product data sheet Description status bit set means UV flag has been set previously VIO not used; always reset not used ...

Page 19

... NXP Semiconductors 7. Limiting values Table 10. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND. Symbol Parameter V battery supply voltage BAT V supply voltage CC V supply voltage on pin voltage on pin INH INH I output current on pin INH ...

Page 20

... NXP Semiconductors 8. Thermal characteristics Table 11. Thermal characteristics Symbol Parameter R thermal resistance from junction to ambient th(j-a) 9. Static characteristics Table 12. Static characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. ...

Page 21

... NXP Semiconductors Table 12. Static characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. bus Symbol Parameter V LOW-level input voltage on pin STBN IL(STBN) I HIGH-level input current on pin STBN IH(STBN) ...

Page 22

... NXP Semiconductors Table 12. Static characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. bus Symbol Parameter Pins BP and BM V idle output voltage on pin BP o(idle)(BP) V idle output voltage on pin BM ...

Page 23

... NXP Semiconductors Table 12. Static characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. bus Symbol Parameter I input leakage current on pin BM LI(BM) V DATA_0 bus common-mode voltage cm(bus)(DATA_0) V DATA_1 bus common-mode voltage cm(bus)(DATA_1) Δ ...

Page 24

... NXP Semiconductors 10. Dynamic characteristics Table 13. Dynamic characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. bus Symbol Parameter Pins BP and BM t delay time from TXD to bus d(TXD-bus) Δt ...

Page 25

... NXP Semiconductors Table 13. Dynamic characteristics All parameters are guaranteed for V Ω unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC. bus Symbol Parameter t delay time from STBN to standby mode STBN LOW to Standby d(STBN-stb) t go-to-sleep hold time ...

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IO TXD 0.3V IO 0.7V IO TXEN 0.3V IO 0.7V IO BGE 0.3V IO +300 mV BP and −300 mV 0.7V IO RXEN 0.3V IO 0.7V IO RXD 0. ...

Page 27

... NXP Semiconductors Fig 11. Receiver test signal TJA1081 Product data sheet V dif (mV) 22.5 ns 400 300 −300 −400 t RXD V dif (mV) 22.5 ns 400 300 −300 −400 t RXD V is the receiver test signal. dif All information provided in this document is subject to legal disclaimers. Rev. 4 — 24 February 2011 FlexRay node transceiver 22 ...

Page 28

... NXP Semiconductors 11. Test information Fig 12. Test circuit for dynamic characteristics Fig 13. Test circuit for automotive transients TJA1081 Product data sheet +5 V 100 TJA1081 +5 V 100 BAT TJA1081 The waveforms of the applied transients are in accordance with ISO 7637, test pulses and 3b. ...

Page 29

... NXP Semiconductors 12. Package outline SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 14 ...

Page 30

... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 31

... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 32

... NXP Semiconductors Fig 15. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. TJA1081 Product data sheet maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level All information provided in this document is subject to legal disclaimers ...

Page 33

... NXP Semiconductors 14. Appendix 14.1 EPL 3.0.1 requirements implemented in the TJA1081 Table 16. EPL 3.0.1 requirements implemented EPL 3.0.1 parameter - R DCLoad dBDTx10, dBDTx01 uData0_LP dBDRxai dBDActivityDetection dBDRxia uData1 − |uData0| dBDRx10, dBDRx01 dBusRx0BD, dBusRx1BD C_StarTxD, C_BDTxD dBDTxRxai - iBP ,iBM BMShortMax BPShortMax iBP ,iBM ...

Page 34

... NXP Semiconductors 15. Abbreviations Table 17. Abbreviation BSS CDM ECU EMC EME EMI ESD HBM MM TSS 16. References [1] EPL — FlexRay Communications System Electrical Physical Layer Specification Version 2.1 Rev. A, FlexRay Consortium, Dec. 2005 [2] EPL — FlexRay Communications System Electrical Physical Layer Specification Version 3.0.1, FlexRay Consortium [3] TJA1080A — ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 36

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 18.4 Licenses NXP ICs with FlexRay functionality This NXP product contains functionality that is compliant with the FlexRay specifications ...

Page 37

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 Optimized for time triggered communication systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Low power management . . . . . . . . . . . . . . . . . 1 2.3 Diagnosis (detection and signalling 2.4 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.5 Functional classes according to FlexRay electrical physical layer specification (see Ref Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information ...

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