Z1601720ASG1868 Zilog, Z1601720ASG1868 Datasheet - Page 34

• Manufacturer Part Number: Z1601720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z1601720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20
PS012002-1201
Z86017/Z16017 PCMCIA Interface Solution
Product Specification
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can respond to an I/O cycle at the address on the address bus.
ATA/IDE Mode: This signal is Data request (DREQ), defined in ATA.
It is issued during DMA data transfers on the data bus.
PC_BVD1/STSCHG/PDIAG (I/O, 8 mA)
PCMCIA Memory Mode: Battery Voltage Detect 1, output.
PCMCIA I/O Mode: Status Changed. This signal is used to indicate
the change of status in the Pin Replacement Register (I/O Mode) or
state of the BVD1 input when in Memory Mode.
ATA/IDE Mode: Passed diagnostics.
PC_BVD2/SPKR/DASP/DREQ (I/O, Tri-State, 10 mA)
PCMCIA Memory Mode: Battery Voltage Detect 2, output.
PCMCIA I/O Mode: SPKR, inverted AUDIO_EXTP signal, output;
PCMCIA ATA Mode: ATA Data Request is the input pin for this
signal, when DMA Enable bit is set in Window Start/Range Address
registers.
ATA/IDE Mode: Drive active/Slave present DASP.
ATA_DATA<15:10> (I/O, Tri-State, 8 mA)
ATA/IDE Mode: Host Data Bus, bits: 15,14,13,12,11,10.
PCMCIA Interface Overview