Z1601720ASG1868 Zilog, Z1601720ASG1868 Datasheet - Page 59

• Manufacturer Part Number: Z1601720ASG1868
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z1601720ASG1868

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EEPROM Register
Address: SELECT 03h
Name: Interface Configuration Register 2
Type: Read/Write
Table 19.
Programming Internal Registers
Bit Placement
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Interface Configuration Register 2: Address 03h
Bit Name
EN_MEM_MODE
EN_INDP_MODE
EN_ATT_MODE
EN_INVERT_HCS0
EN_INVERT_HCS1
EN_INVERT_ATRST
EN_IO_MODE
Reserved
Z86017/Z16017 PCMCIA Interface Solution
Description
Enables PCMCIA memory access mode. This bit controls
window0. It is active when set to 1. On Power-On Reset,
this bit is set to 0.
Enables PCMCIA independent I/O access mode. This bit
controls window0. It is active when set to 1. On Power-On
Reset, this bit is set to 0.
Enables PCMCIA attribute memory access. This bit is
active when set to 1. On Power-On Reset, this bit is set to
0. Also see Registers 08h and 09h (Table 28 and Table 29).
Inverts the polarity of HCS0 output. HCS0 is active High
when this bit is set. HCS0 is active Low when this bit is
cleared. This bit is active when set to 1. On Power-On
Reset, this bit is set to 0, active Low. Also see Register 02h
(Table 14).
Inverts the polarity of HCS1 output. HCS1 is active High
when this bit is set. HCS1 is active Low when this bit is
cleared. This bit is active when set to 1. On Power-On
Reset, this bit is set to 0, active Low. Also see Register 02h
(Table 14).
Inverts the polarity of the ATA_HRESET output.
Enables PCMCIA/ATA/IDE access to 1Fx, 3Fx, 17x, 1Fx
task Registers. This bit controls window0. This bit is active
when set to 1. On Power-On-Reset, this bit is set to 0.
Product Specification
PS012002-1201
45