UJA1069TW24/3V0:51 NXP Semiconductors, UJA1069TW24/3V0:51 Datasheet - Page 32

• Manufacturer Part Number: UJA1069TW24/3V0:51
• Description: IC LIN FAIL-SAFE 24-HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/3V0:51

• Applications: Automotive
• Interface: LIN (Local Interconnect Network)
• Voltage - Supply: 3V
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280016512; UJA1069TW24/3V0; UJA1069TW24/3V0

NXP Semiconductors
Table 9.
Table 10.
UJA1069_3
Product data sheet
Bit
15 and 14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
15 and 14
13
Interrupt register bit description
System Configuration and System Configuration Feedback register bit description
Symbol
A1, A0
RRS
RO
WTI
OTI
-
SPIFI
BATFI
VFI
-
LINFI
WI
WDRI
-
LINI
Symbol
A1, A0
RRS
6.12.8 System Configuration register and System Configuration Feedback register
These registers allow configuration of the behavior of the SBC, and allow the settings to
be read back.
Description
register address
Read Register Select
Read Only
Watchdog Time-out
Interrupt
OverTemperature
Interrupt
reserved
SPI clock count Failure
Interrupt
BAT Failure Interrupt
Voltage Failure Interrupt 1
reserved
LIN Failure Interrupt
Wake-up Interrupt
Watchdog Restart
Interrupt
reserved
LIN Wake-up Interrupt
Description
register address
Read Register Select
Rev. 03 — 10 September 2007
Value
01
1
1
0
1
0
1
0
0
1
0
1
0
0
0
1
0
1
0
1
0
0
1
0
Value
10
1
0
Function
read Interrupt register
read the Interrupt register without writing to the Interrupt
Enable register
read the Interrupt register and write to the Interrupt Enable
register
a watchdog overflow during Standby mode has caused an
interrupt (interrupt-based cyclic wake-up feature)
no interrupt
the temperature warning status (TWS) has changed
no interrupt
reserved for SBCs with CAN transceiver
wrong number of CLK cycles (more than, or less than 16)
during SPI access
no interrupt; SPI access is ignored if the number of CLK
cycles does not equal 16
falling edge at pin SENSE has forced an interrupt
no interrupt
V1D or V3D has been cleared
no interrupt
reserved for SBCs with CAN transceiver
LIN failure status has changed
no interrupt
a negative edge at pin WAKE has been detected
no interrupt
A watchdog restart during watchdog OFF has caused an
interrupt
no interrupt
reserved for SBCs with CAN transceiver
LIN wake-up event has caused an interrupt
no interrupt
Function
select System Configuration register
read the General Purpose Feedback register 0
read the System Configuration Feedback register
LIN fail-safe system basis chip
UJA1069
© NXP B.V. 2007. All rights reserved.
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