UJA1069TW24/3V0:51 NXP Semiconductors, UJA1069TW24/3V0:51 Datasheet - Page 37

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UJA1069TW24/3V0:51

Manufacturer Part Number
UJA1069TW24/3V0:51
Description
IC LIN FAIL-SAFE 24-HTSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1069TW24/3V0:51

Applications
Automotive
Interface
LIN (Local Interconnect Network)
Voltage - Supply
3V
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280016512
UJA1069TW24/3V0
UJA1069TW24/3V0
NXP Semiconductors
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
UJA1069_3
Product data sheet
Symbol
RLC
V3C
V1CMC
WEN
WSC
ILEN
ILC
Symbol
LMC
LSC
LDC
LTC
Symbol
ISDM
WDPRE
V1RTHC
Symbol
DIC
GP0[10:7]
GP0[6:0]
Symbol
GP1[11:0]
System Configuration register and System Configuration Feedback register: status at reset
Physical Layer Control register and Physical Layer Control Feedback register: status at reset
Special Mode register: status at reset
General Purpose register 0 and General Purpose Feedback register 0: status at reset
General Purpose register 1 and General Purpose Feedback register 1: status at reset
Name
Reset Length Control
V3 Control
V1 Current Monitor
Control
Wake Enable
Wake Sample Control
INH/LIMP Enable
INH/LIMP Control
Name
LIN Mode Control
LIN Slope Control
LIN Driver Control
LIN Transmitter Control 0 (on)
Name
Initialize Software Development Mode
Watchdog Prescale Factor
V1 Reset Threshold Control
Name
Device Identification Control
general purpose bits 10 to 7 (version)
general purpose bits 6 to 0 (SBC type)
Name
general purpose bits 11 to 0
Power-on
0 (short)
00 (off)
0 (watchdog
restart)
1 (enabled)
0 (control)
0 (floating)
0 (LOW)
Power-on
0 (Active mode
disabled)
0 (normal)
0 (LIN 2.0)
Rev. 03 — 10 September 2007
Power-on
0 (no)
00 (factor 1)
00 (90 %)
Power-on
0 (Device ID)
Mask version
000 1001 (UJA1069) no change
Power-on
0000 0000 0000
Start-up
no change
no change
no change
no change
no change
see
if ILC = 1,
otherwise no change
no change
Start-up
no change
no change
no change
no change
Figure 12
Start-up
no change
no change
no change
Start-up
no change
no change
Start-up
no change
Restart
1 (long)
no change
no change
no change
no change
0 (floating) if ILC = 1,
otherwise no change
no change
Restart
no change
no change
no change
no change
LIN fail-safe system basis chip
Restart
no change
no change
00 (90 %)
Restart
no change
no change
no change
Restart
no change
UJA1069
© NXP B.V. 2007. All rights reserved.
Fail-Safe
1 (long)
no change
no change
no change
no change
1 (active)
0 (LOW)
Fail-Safe
no change
no change
no change
no change
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