HEF40373BP NXP Semiconductors, HEF40373BP Datasheet - Page 2

HEF40373BP

Manufacturer Part Number
HEF40373BP
Description
Manufacturer
NXP Semiconductors
Type
D-Typer
Datasheet

Specifications of HEF40373BP

Logic Family
4000
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Output Type
3-State
Package Type
PDIP
Propagation Delay Time
300ns
Operating Supply Voltage (typ)
3.3/5/9/12V
High Level Output Current
-3.6mA
Low Level Output Current
3.6mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
15V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HEF40373BP
Manufacturer:
VISHAY
Quantity:
1 200
Part Number:
HEF40373BP
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
DESCRIPTION
The HEF40373B is an 8-bit transparent latch with 3-state
buffered outputs. The output stages have high current
output capability suitable for driving highly capacitive
loads. The latch outputs follow the data inputs when the
latch enable (E) is HIGH. When E is LOW, the data that
meets the set-up times is latched. The 3-state outputs are
controlled by the output enable input EO. A HIGH on
January 1995
HEF40373BP(N): 20-lead DIL; plastic
HEF40373BD(F): 20-lead DIL; ceramic (cerdip)
HEF40373BT(D): 20-lead SO; plastic
( ): Package Designator North America
Octal transparent latch with 3-state outputs
Fig.1 Functional diagram.
(SOT146-1)
(SOT152)
(SOT163-1)
2
EO causes the outputs to assume a high impedance
OFF-state. The device features hysteresis on the E input
to improve noise rejection.
Schmitt-trigger action in the E input makes the circuit
highly tolerant to slower input rise and fall times.
The HEF40373B is pin and functionally compatible with
the TTL ‘373’ device.
Supply voltage range: 3 to 15 V.
PINNING
FAMILY DATA, I
See Family Specifications
D
E
EO
O
0
0
to D
to O
7
7
data inputs
latch enable input
output enable input (active LOW)
3-state buffered outputs
DD
Fig.2 Pinning diagram.
LIMITS category MSI
Product specification
HEF40373B
MSI

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