CYNSE70128-83BGC Cypress Semiconductor Corp, CYNSE70128-83BGC Datasheet - Page 21

• Manufacturer Part Number: CYNSE70128-83BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70128-83BGC

• Operating Supply Voltage (min): 1.425V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

9.0
Figure 9-1 shows CYNSE70128 data and mask array addressing.
10.0
A master device such as an ASIC controller issues commands to the CYNSE70128 device using the command valid (CMDV)
signal and the CMD bus. The following subsections describe the operation of the commands.
10.1
The CYNSE70128 implements four basic commands, shown in Table 10-1. The command code must be presented to CMD[1:0]
while keeping the CMDV signal high for two CLK2X cycles (designated as cycles A and B) when the CLK_MODE pin is low. In
CLK2X mode, the controller ASIC must align the instructions using the PHS_L signal. The command code must be presented to
CMD[1:0] while keeping the CMDV signal high for one CLK1X cycle when the CLK_MODE pin is high. In CLK1X mode the high
phase of the CLK1X is designated as cycle A and the low phase of the CLK1X is designated as cycle B. The CMD[10:2] field
passes the parameters of the command in cycles A and B.
Document #: 38-02040 Rev. *F
Command Codes
Data and Mask Addressing
Commands
CFG = 0000000000000000
64K
(72-bit configuration)
71
65535
Figure 9-1. Addressing the CYNSE70128 Data and Mask Arrays
72
0
1
2
3
Figure 8-2. Multiwidth Database Configurations Example
0
16K
283
65532
CFG = 10 10 01 01 11 11 00 00
72
0
4
CFG = 1010101010101010
8 K
8 K
8 K
8 K
4 K
4 K
2 K
2 K
(288-bit configuration)
65533
72
Inactive (low power)
1
5
72
72
72
72
144
144
65534
72
288
288
2
6
65535
72
3
7
0
CFG = 0101010101010101
(144-bit configuration)
32K
143
65534 65535
72
0
2
4
6
72
1
3
5
7
CYNSE70128
0
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