PCF8576CH NXP Semiconductors, PCF8576CH Datasheet

PCF8576CH

Manufacturer Part Number
PCF8576CH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8576CH

Operating Supply Voltage (typ)
2.5/3.3/5V
Number Of Digits
20
Number Of Segments
160
Package Type
LQFP
Pin Count
64
Mounting
Surface Mount
Power Dissipation
400mW
Frequency (max)
315KHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Lead Free Status / Rohs Status
Compliant

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1. General description
2. Features
1.
The definition of the abbreviations and acronyms used in this data sheet can be found in
The PCF8576C is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD)
multiplexed LCD containing up to four backplanes and up to 40 segments and can easily
be cascaded for larger LCD applications. The PCF8576C is compatible with most
microprocessors or microcontrollers and communicates via a two-line bidirectional
I
auto-incremented addressing, by hardware subaddressing.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
C-bus. Communication overheads are minimized by a display RAM with
PCF8576C
Universal LCD driver for low multiplex rates
Rev. 09 — 9 July 2009
Single-chip LCD controller and driver
40 segment drives:
Versatile blinking modes
No external components required (even in multiple device applications)
Selectable backplane drive configuration: static or 2, 3, 4 backplane multiplexing
Selectable display bias configuration: static,
Internal LCD bias generation with voltage-follower buffers
40
Auto-incremented display data loading across device subaddress boundaries
Display memory bank switching in static and duplex drive modes
Wide logic LCD supply range:
Low power consumption
May be cascaded for large LCD applications (up to 2560 segments possible)
Cascadable with 24-segment LCD driver PCF8566
No external components
Compatible with chip-on-glass technology
Separate or combined LCD and logic supplies
Optimized pinning for plane wiring in both and multiple PCF8576C applications
Power-saving mode for extremely low power consumption in battery-operated and
telephone applications
N
N
N
N
N
Up to twenty 7-segment numeric characters
Up to ten 14-segment alphanumeric characters
Any graphics of up to 160 elements
From 2 V for low-threshold LCDs
Up to 6 V for guest-host LCDs and high-threshold twisted nematic LCDs
4-bit RAM for display data storage
1
with low multiplex rates. It generates the drive signals for any static or
1
2
or
Section
1
3
19.
Product data sheet

Related parts for PCF8576CH

PCF8576CH Summary of contents

Page 1

PCF8576C Universal LCD driver for low multiplex rates Rev. 09 — 9 July 2009 1. General description The PCF8576C is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) multiplexed LCD containing up to four backplanes and ...

Page 2

... Marking codes Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates [1] 2.82 0.38 mm [2] 2.82 0.38 mm [2] 0.40 mm Marking code PCF8576CH PCF8576CT PCF8576CTT PC8576C-1 PC8576C-1 PC8576C-2 Version SOT314-2 SOT190-1 SOT793-1 PCF8576CU/10 PCF8576CU PCF8576CU/2 © NXP B.V. 2009. All rights reserved. ...

Page 3

... NXP Semiconductors 5. Block diagram V DD LCD BIAS GENERATOR V LCD CLK TIMING BLINKER SYNC OSC OSCILLATOR POWER- RESET V SS SCL INPUT FILTERS SDA Fig 1. Block diagram of PCF8576C PCF8576C_9 Product data sheet BP0 BP2 BP1 BP3 BACKPLANE OUTPUTS LCD VOLTAGE SELECTOR PCF8576C DISPLAY ...

Page 4

... SDA SCL 11 SYNC 12 13 CLK OSC Top view. For mechanical details, see Figure Pin configuration of PCF8576CH (LQFP64) Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates PCF8576CH 001aag241 32. 48 n.c. 47 S17 46 S16 45 S15 44 S14 43 S13 42 S12 ...

Page 5

... NXP Semiconductors Fig 3. PCF8576C_9 Product data sheet 1 SDA SCL 2 SYNC 3 4 CLK OSC SA0 LCD BP0 13 BP2 14 15 BP1 BP3 S10 27 S11 28 Top view. For mechanical details, see Figure Pin configuration of PCF8576CT (VSO56) Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates ...

Page 6

... NXP Semiconductors Fig 4. PCF8576C_9 Product data sheet 1 SDA SCL 2 SYNC 3 4 CLK OSC SA0 LCD BP0 13 BP2 14 15 BP1 BP3 S10 27 S11 28 Top view. For mechanical details, see Figure Pin configuration of PCF8576CTT (HTSSOP56) Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates ...

Page 7

... NXP Semiconductors Fig 5. PCF8576C_9 Product data sheet S18 35 S19 36 S20 37 S21 38 S22 39 S23 40 S24 41 PCF8576CU S25 42 S26 43 S27 44 S28 45 S29 46 S30 47 S31 48 S32 49 S33 Top view. For mechanical details, see Figure Pin locations of PCF8576CU Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates ...

Page 8

... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin PCF8576CH SDA 10 SCL 11 SYNC 12 CLK OSC SA0 LCD BP0, BP2 BP1, BP3 S0 to S39 24, 33 [1] The substrate (rear side of the die) is wired to V PCF8576C_9 Product data sheet PCF8576CT PCF8576CU ...

Page 9

... NXP Semiconductors 7. Functional description The PCF8576C is a versatile peripheral device designed to interface any microprocessor or microcontroller to a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing backplanes and segments. The display configurations possible with the PCF8576C depend on the number of active backplane outputs required. Display confi ...

Page 10

... NXP Semiconductors • The I • The data pointer and the subaddress counter are cleared Remark: Do not transfer data on the I reset action to complete. 7.2 LCD bias generator The full-scale LCD voltage (V temperature compensated externally through the V Fractional LCD biasing voltages are obtained from an internal voltage divider comprising ...

Page 11

... NXP Semiconductors for static mode for 1:2 multiplex for 1:3 multiplex for 1:4 multiplex The RMS off-state voltage (V V off RMS Discrimination is the ratio ----------------------- - V off RMS Using Equation 1 bias bias is 2 The advantage of these LCD drive modes is a reduction of the LCD full scale voltage V as follows: • ...

Page 12

... NXP Semiconductors 7.4 LCD drive mode waveforms 7.4.1 Static drive mode The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive waveforms for this mode are shown in Fig 7. PCF8576C_9 Product data sheet V LCD BP0 V SS ...

Page 13

... NXP Semiconductors 7.4.2 1:2 Multiplex drive mode When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The PCF8576C allows the use of Fig 8. PCF8576C_9 Product data sheet 1 1 bias LCD BP0 LCD LCD BP1 LCD LCD LCD Sn LCD LCD ...

Page 14

... NXP Semiconductors Fig 9. PCF8576C_9 Product data sheet V LCD LCD BP0 LCD LCD LCD BP1 LCD LCD LCD LCD LCD LCD S n LCD LCD LCD LCD state LCD LCD V LCD V LCD LCD LCD 0 V state LCD LCD V LCD V ( (t) V (t). state1 Sn BP0 ...

Page 15

... NXP Semiconductors 7.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies as shown in Fig 10. Waveforms for the 1:3 multiplex drive mode with PCF8576C_9 Product data sheet Figure 10. V LCD LCD BP0 LCD V SS ...

Page 16

... NXP Semiconductors 7.4.4 1:4 multiplex drive mode When four backplanes are provided in the LCD, the 1:4 multiplex drive mode applies, as shown in BP0 BP1 BP2 BP3 Sn Sn+1 Sn+2 Sn+3 state 1 state 2 Fig 11. Waveforms for the 1:4 multiplex mode with PCF8576C_9 Product data sheet Figure 11 ...

Page 17

... NXP Semiconductors 7.5 Oscillator The internal logic and the LCD drive signals of the PCF8576C are timed by the frequency f , which equals either the built-in oscillator frequency f clk f . clk(ext) The clock frequency (f for data reception from the I rate of 100 kHz, f 7.5.1 Internal clock ...

Page 18

... NXP Semiconductors The lower clock frequency has the disadvantage of increasing the response time when large amounts of display data are transmitted on the I process a display data byte before the next one arrives, it holds the SCL line LOW until the first display data byte is stored. This slows down the transmission rate of the I no data loss occurs ...

Page 19

... NXP Semiconductors display RAM bits backplane outputs Fig 12. Display RAM bit map When display data is transmitted to the PCF8576C, the display bytes received are stored in the display RAM in accordance with the selected LCD drive mode. The data is stored as it arrives and does not wait for an acknowledge cycle as with the commands. Depending on the current multiplex drive mode, data is stored singularly, in pairs, triplets or quadruplets. To illustrate the fi ...

Page 20

LCD segments LCD backplanes S a n+2 BP0 n+3 n+1 static n+5 n n+6 BP0 1 ...

Page 21

... NXP Semiconductors 7.12 Data pointer The addressing mechanism for the display RAM is realized using the data pointer. This allows the loading of an individual display data byte or a series of display data bytes, into any location of the display RAM. The sequence commences with the initialization of the ...

Page 22

... NXP Semiconductors The PCF8576C includes a RAM bank switching feature in the static and 1:2 multiplex drive modes. In the static drive mode, the bank select command may request the contents of bit selected for display instead of the contents of bit 0. In 1:2 multiplex drive mode, the contents of bits 2 and 3 may be selected instead of bits 0 and 1. This enables preparation of display information in an alternative bank and the ability to switch to it once it has been assembled ...

Page 23

... NXP Semiconductors 8. Basic architecture 8.1 Characteristics of the I 2 The I C-bus provides bidirectional, two-line communication between different IC or modules. The two lines are a Serial Data line (SDA) and a Serial Clock Line (SCL). When connected to the output stages of a device, both lines must be connected to a positive supply via a pull-up resistor ...

Page 24

... NXP Semiconductors SDA SCL Fig 16. System configuration 8.1.3 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse ...

Page 25

... NXP Semiconductors 8.1.4 PCF8576C I The PCF8576C acts transmit data the acknowledge signals of the selected devices. Device selection depends on the 2 I C-bus slave address, the transferred command data and the hardware subaddress. In single device application, the hardware subaddress inputs A0, A1 and A2 are normally ...

Page 26

... NXP Semiconductors Fig 18. I 8.3 Command decoder The command decoder identifies command bytes that arrive on the I commands carry a continuation bit C in their most significant bit position as shown in Figure 19. When this bit is set, it indicates that the next byte of the transfer to arrive will also represent a command ...

Page 27

... NXP Semiconductors 8.3.1 Mode set command Table 9. LCD drive mode Drive mode static 1:2 1:3 1:4 Table 10. LCD bias 1 bias 3 1 bias 2 Table 11. Display status disabled (blank) enabled [1] The possibility to disable the display allows implementation of blinking under external control. Table 12. ...

Page 28

... NXP Semiconductors 8.3.4 Bank select command Table 15. Bank Input bank Output bank [1] The bank select command has no effect in 1:3 or 1:4 multiplex drive modes. 8.3.5 Blink command Table 16. Blink frequency off Table 17. Blink mode normal blinking alternate RAM bank blinking 8.4 Display controller The display controller executes the commands identifi ...

Page 29

... NXP Semiconductors 10. Limiting values CAUTION Static voltages across the liquid crystal display can build up when the LCD supply voltage (V LCD display artifacts. To avoid such artifacts, V Table 18. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter LCD DD(LCD) P tot ...

Page 30

... NXP Semiconductors 11. Static characteristics Table 19. Static characteristics Symbol Parameter Supplies V supply voltage DD V LCD supply voltage LCD I supply current low-power mode supply DD(lp) current Logic V LOW-level input voltage IL V HIGH-level input voltage IH V LOW-level output voltage OL V HIGH-level output voltage ...

Page 31

... NXP Semiconductors 11.1 Typical supply current characteristics normal 40 mode 100 LCD amb Fig 21 function normal mode f = 200 kHz clk 30 20 power-saving mode external clock; T LCD Fig 23 function PCF8576C_9 Product data sheet mbe530 I DD(LCD power-saving mode 200 f (Hz Fig 22. mbe528 I DD(LCD kHz ...

Page 32

... NXP Semiconductors 11.2 Typical LCD output characteristics 10 R O(max LCD amb Fig 25 function of V O(max) PCF8576C_9 Product data sheet mbe532 R O(max (V) DD Fig 26 Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates 2.5 2.0 1.5 1.0 0 LCD as a function of T ...

Page 33

... NXP Semiconductors 12. Dynamic characteristics Table 20. Dynamic characteristics Symbol Parameter Timing characteristics: driver timing waveforms (see f clock frequency clk t clock HIGH time clk(H) t clock LOW time clk(L) t SYNC propagation delay PD(SYNC_N) t SYNC LOW time SYNC_NL t driver propagation delay PD(drv) 2 Timing characteristics: I ...

Page 34

... NXP Semiconductors BP0 to BP3, and S0 to S39 Fig 27. Driver timing waveforms SDA SCL SDA Fig 28. I PCF8576C_9 Product data sheet 1/f CLK t clk(H) CLK SYNC t PD(SYNC_N BUF LOW t HD;STA C-bus timing waveforms Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates ...

Page 35

... NXP Semiconductors 13. Application information 13.1 Cascaded operation In large display configurations PCF8576Cs can be recognized on the same 2 I C-bus by using the 3-bit hardware subaddress (A0, A1 and A2) and the programmable 2 I C-bus slave address (SA0). Table 21. Cluster 1 2 Cascaded PCF8576Cs are synchronized. They can share the backplane signals from one of the devices in the cascade ...

Page 36

... NXP Semiconductors V LCD V DD MICRO- PROCESSOR/ MICRO- CONTROLLER V SS Fig 29. Cascaded PCF8576C configuration The SYNC line is provided to maintain the correct synchronization between all cascaded PCF8576Cs. This synchronization is guaranteed after the power-on reset. The only time that SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in adverse electrical environments ...

Page 37

... NXP Semiconductors Fig 30. Synchronization of the cascade for the various PCF8576C drive modes PCF8576C_9 Product data sheet BP0 SYNC (a) static drive mode. BP0 (1/2 bias) BP0 (1/3 bias) SYNC (b) 1:2 multiplex drive mode. BP0 (1/3 bias) SYNC (c) 1:3 multiplex drive mode. BP0 ...

Page 38

... NXP Semiconductors SDA SCL SYNC CLK V DD OSC SA0 LCD BP0 BP2 BP1 BP3 S10 S11 S0 S10 S11 backplanes Fig 31. Single plane wiring of packaged PCF8576CTs PCF8576C_9 Product data sheet 1 56 S39 2 55 S38 3 54 S37 4 53 S36 5 52 S35 6 51 S34 ...

Page 39

... DIMENSIONS (mm are the original dimensions) A UNIT max. 0.20 1.45 1.6 mm 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT314-2 136E10 Fig 32. Package outline SOT314-2 (LQFP64) of PCF8576CH PCF8576C_9 Product data sheet 2.5 scale ...

Page 40

... NXP Semiconductors VSO56: plastic very small outline package; 56 leads pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 3.0 mm 3.3 0.25 0.1 2.8 0.012 0.12 inches 0.01 0.13 0.004 0.11 Notes 1. Plastic or metal protrusions of 0.3 mm (0.012 inch) maximum per side are not included. ...

Page 41

... NXP Semiconductors HTSSOP56: plastic thermal enhanced thin shrink small outline package; 56 leads; body width 6.1 mm; exposed die pad pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

Page 42

... NXP Semiconductors 15. Bare die outline Wire bond die; 56 bonding pads; 3.0 x 2. Dimensions (3) Unit max 0.610 mm nom 0.38 2.82 3.00 min 0.096 Note 1. Pad size 2. Passivation opening 3. Dimension not drawn to scale 4. Marking code: PC8576C-1 Outline version IEC PCF8576CU/10 Fig 35. Bare die outline of PCF8576CU/10 ...

Page 43

... NXP Semiconductors Wire bond die; 56 bonding pads; 3.0 x 2. Dimensions (3) Unit max 0.610 mm nom 0.38 2.82 3.00 min 0.096 Note 1. Pad size 2. Passivation opening 3. Dimension not drawn to scale 4. Marking code: PC8576C-1 Outline version IEC PCF8576CU Fig 36. Bare die outline of PCF8576CU ...

Page 44

... NXP Semiconductors Bare die; 56 bumps; 3.0 x 2. Dimensions Unit max mm nom 0.398 0.0175 0.380 0.094 2.82 min Note 1. Dimension not drawn to scale 2. Marking code: PC8576C-2 Outline version IEC PCF8576CU/2 Fig 37. Bare die outline of PCF8576CU/2 PCF8576C_9 Product data sheet 0.5 scale ...

Page 45

... NXP Semiconductors Table 22. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip. Symbol SDA SCL SYNC CLK V DD OSC SA0 LCD BP0 BP2 BP1 BP3 S10 S11 S12 S13 S14 S15 S16 S17 S18 ...

Page 46

... NXP Semiconductors Table 22. All x/y coordinates represent the position of the center of each pad with respect to the center (x the chip. Symbol S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 Table 23. Symbol 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling ...

Page 47

... NXP Semiconductors Fig 38. Tray details Fig 39. Tray alignment Table 24. Symbol PCF8576C_9 Product data sheet Tray dimensions Description pocket pitch; x direction pocket pitch; y direction pocket width; x direction pocket width; y direction Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates ...

Page 48

... NXP Semiconductors Table 24. Symbol PCF8576C_9 Product data sheet Tray dimensions Description tray width; x direction tray width; y direction cut corner to pocket 1,1 center cut corner to pocket 1,1 center tray thickness tray cross section tray cross section pocket depth number of pockets; x direction number of pockets; y direction Rev. 09 — ...

Page 49

... NXP Semiconductors 17.2 Film frame carrier information 100 m Fig 40. Layout of wafer on film frame carrier of PCF8576CU/10 PCF8576C_9 Product data sheet S aw lane 200 m detail X Marking code X Rev. 09 — 9 July 2009 PCF8576C Universal LCD driver for low multiplex rates Straight edge of the wafer 013aaa112 © ...

Page 50

... NXP Semiconductors 18. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 18.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 51

... NXP Semiconductors 18.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 52

... NXP Semiconductors Fig 41. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . PCF8576C_9 Product data sheet maximum peak temperature = MSL limit, damage level temperature minimum peak temperature ...

Page 53

... NXP Semiconductors 19. Abbreviations Table 27. Acronym DC FFC HBM LCD LSB MM MOS MSB MSL PCB POR RC RAM RMS SCL SDA SMD PCF8576C_9 Product data sheet Abbreviations Description Direct Current Film Frame Carrier Human Body Model Inter-Integrated Circuit Integrated Circuit Liquid Crystal Display Least Significant Bit ...

Page 54

... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Symbols updated and checked with NXP Symbols Library • ...

Page 55

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 56

... NXP Semiconductors 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Functional description . . . . . . . . . . . . . . . . . . . 9 7.1 Power-on-reset . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.2 LCD bias generator 7.3 LCD voltage selector . . . . . . . . . . . . . . . . . . . 10 7.4 LCD drive mode waveforms . . . . . . . . . . . . . . 12 7 ...

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