AM29DL640H-90EI Spansion Inc., AM29DL640H-90EI Datasheet - Page 3

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AM29DL640H-90EI

Manufacturer Part Number
AM29DL640H-90EI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29DL640H-90EI

Cell Type
NOR
Density
64Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Bottom/Top
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
3/8.5 to 9.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29DL640H-90EI
Manufacturer:
AMD
Quantity:
61
Company:
Part Number:
AM29DL640H-90EI
Quantity:
423
Am29DL640H
64 Megabit (8 M x 8-Bit/4 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
PACKAGE OPTIONS
PERFORMANCE CHARACTERISTICS
This product has been retired and is not recommended for designs. For new and current designs, S29JL064H (for TSOP packages) and S29PL064J (for FBGA packages) supersede
AM29DL320H as the factory-recommended migration path. Please refer to each respective datasheets for specifications and ordering information. Availability of this document is retained
for reference and historical purposes only.
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
— Zero latency between read and write operations
Flexible Bank
— Read may occur in any of the three banks not being
— Four banks may be grouped by customer to achieve
Boot Sectors
— Top and bottom boot sectors in the same device
— Any combination of sectors can be erased
Manufactured on 0.13 µm process technology
Secured Silicon Sector: Extra 256 Byte sector
— Factory locked and identifiable: 16 bytes available for
— Customer lockable: One-time programmable only.
Zero Power Operation
— Sophisticated power management circuits reduce
Compatible with JEDEC standards
— Pinout and software compatible with
63-ball Fine Pitch BGA
48-pin TSOP
High performance
— Access time as fast as 55 ns
— Program time: 4 µs/word typical using accelerated
executing erase/program functions in another bank.
written or erased.
desired bank divisions.
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
Once locked, data cannot be changed
power consumed during inactive periods to nearly
zero.
single-power-supply flash standard
programming function
TM
architecture
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE FEATURES
HARDWARE FEATURES
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Minimum 1 million erase cycles guaranteed per
sector
20 year data retention at 125°C
— Reliable operation for the life of the system
Data Management Software (DMS)
— AMD-supplied software manages data programming,
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
— Suspends erase operations to read data from, or
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
Unlock Bypass Program command
— Reduces overall programming time when issuing
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0, 1,
— Acceleration (ACC) function accelerates program
Sector protection
— Hardware method to prevent any program or erase
— Temporary Sector Unprotect allows changing data in
enabling EEPROM emulation
program data to, a sector that is not being erased,
then resumes the erase operation.
program or erase cycles
multiple program command sequences
cycle completion
machine to the read mode
140, and 141, regardless of sector protect status
timing
operation within a sector
protected sectors in-system
Publication# 27082
Issue Date: June 7, 2005
Rev: A Amendment/+7

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