HEF40240BT NXP Semiconductors, HEF40240BT Datasheet
HEF40240BT
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HEF40240BT Summary of contents
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... Ordering information Table 1. Ordering information − ° All types operate from +85 Type number Package Name HEF40240BP DIP20 HEF40240BT SO20 DD ° C. Description plastic dual in-line package; 20 leads (300 mil) plastic small outline package; 20 leads; body width 7.5 mm power supply range referenced another input ...
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... NXP Semiconductors 5. Functional diagram 2 1A0 4 1A1 6 1A2 8 1A3 1 1OE 11 2A0 13 2A1 15 2A2 17 2A3 19 2OE Fig 1. Functional diagram 6. Pinning information 6.1 Pinning HEF40240B 1 1OE 2 1A0 3 2Y3 1A1 4 2Y2 5 1A2 6 2Y1 7 1A3 8 2Y0 001aal326 Fig 3. Pin configuration DIP20 HEF40240B_4 Product data sheet 18 1Y0 ...
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... NXP Semiconductors 6.2 Pin description Table 2. Pin description Symbol Pin 1OE 1 1A0, 1A1, 1A2, 1A3 2Y0, 2Y1, 2Y2, 2Y3 2A0, 2A1, 2A2, 2A3 11, 13, 15 1Y0, 1Y1, 1Y2, 1Y3 18, 16, 14, 12 2OE 19 7. Functional description [1] Table 3. Function table Inputs nAn [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. ...
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... NXP Semiconductors Fig 5. Schematic diagram of a buffer output stage (1) P-channel MOS transistor conducting. (2) P-channel MOS transistor and bipolar NPN transistor conducting. Fig 6. Typical output source current characteristic 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage ...
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... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter V HIGH-level input voltage IH V LOW-level input voltage IL V hysteresis voltage H HIGH-level output voltage | LOW-level output voltage OL I HIGH-level output current LOW-level output current OL I input leakage current I I supply current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter t HIGH to LOW PHL propagation delay t LOW to HIGH PLH propagation delay t HIGH to OFF-state PHZ propagation delay t LOW to OFF-state PLZ propagation delay t OFF-state to HIGH PZH propagation delay t OFF-state to LOW ...
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... NXP Semiconductors ( THL ( TLH Fig 7. Output transition times as a function of the load capacitance Table 8. Dynamic power dissipation P P can be calculated from the formulas shown Symbol Parameter V P dynamic power dissipation HEF40240B_4 Product data sheet THL t TLH (ns ≤ ns Typical formula for 4250 × ...
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... NXP Semiconductors 12. Waveforms Measurement points are given in Fig 8. Waveforms showing propagation and transition delays nOE input nYn output LOW-to-OFF OFF-to-LOW nYn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Fig 9. 3-state enable and disable times Table 9. Measurement points Supply voltage Input 0.5V ...
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... NXP Semiconductors a. Input waveforms b. Test circuit For test data see Table 10. Definitions for test circuit Load resistance Load capacitance Termination resistance should be equal to output impedance Z T Fig 10. Test circuit for measuring switching times Table 10. Test data Supply voltage Input HEF40240B_4 Product data sheet ...
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... NXP Semiconductors 13. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... Release date HEF40240B_4 20100420 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Pins renamed throughout. • Section 2 “Features and benefits” ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors 17. Contact information For more information, please visit: For sales office addresses, please send an email to: HEF40240B_4 Product data sheet http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 04 — 20 April 2010 HEF40240B Octal inverting buffers with 3-state outputs © ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Package outline ...