GS842Z36AGB-150 GSI TECHNOLOGY, GS842Z36AGB-150 Datasheet - Page 21

• Manufacturer Part Number: GS842Z36AGB-150
• Description: 58M6829
• Manufacturer: GSI TECHNOLOGY

Specifications of GS842Z36AGB-150

• Memory Size: 4Mbit
• Memory Configuration: 128K X 36
• Clock Frequency: 150MHz
• Access Time: 10ns
• Supply Voltage Range: 2.3V To 2.7V, 3V To 3.6V
• Memory Case Style: BGA
• No. Of Pins: 119
• Rohs Compliant: Yes

GS842Z18/36AB-180/166/150/100
Tap Controller Instruction Set
ID Register Contents
Die
GSI Technology
I/O
Revision
Not Used
JEDEC Vendor
Configuration
Code
ID Code
Bit #
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
Overview
There are two classes of instructions defined in the Standard 1149.1-1990; the standard (Public) instructions, and device specific
(Private) instructions. Some Public instructions are mandatory for 1149.1 compliance. Optional Public instructions must be
implemented in prescribed ways. The TAP on this device may be used to monitor all input and I/O pads, and can be used to load
address, data or control signals into the RAM or to preload the I/O buffers.
When the TAP controller is placed in Capture-IR state the two least significant bits of the instruction register are loaded with 01.
When the controller is moved to the Shift-IR state the Instruction Register is placed between TDI and TDO. In this state the desired
instruction is serially loaded through the TDI input (while the previous contents are shifted out at TDO). For all instructions, the
TAP executes newly loaded instructions only when the controller is moved to Update-IR state. The TAP instruction set for this
device is listed in the following table.
Rev: 1.04b 1/2009
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© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.