ST70235A STMicroelectronics, ST70235A Datasheet - Page 14

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ST70235A

Manufacturer Part Number
ST70235A
Description
Transceiver 144-Pin TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST70235A

Package
144TQFP
Power Supply Type
Analog
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.62|3 V
Maximum Operating Supply Voltage
1.98|3.6 V
Case
QFP

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ST70235A
Figure 11 : Generic Processor Interface Read Timing Cycle
Generic processor interface Cycle Timing
All AC characteristics are indicated for a 100pF capacitive load.Cycle timing for generic interface.
Table 2 : Cycle timing
The timing are generally presented with the write signal, but as shown on the read diagram, they are also
valid for the read signal, so for example the Trdy2wr timing is the same as what can be Trdy2rd.
14/28
Tcsre
Talew
Tavs
Tavh
Tale2cs
Tale2Z
Tcs2wr
Tcs2rd
Twr2d
Twr2rdy
Trd2rdy
Trdy2wr
Trdy2rd
Tdvs
Tdvh
Trdy2cs
Tmclk
Twr2Mclk
Trd2Mclk
1: WRB = BE1 is high.
ALE
CSB
Address/DATA
RDB
RDYB
MClk
Symbol
1
Access Time
Ale pulse width
Address valid setup time
Address valid hold time
ALE to CSB
ALE to high Z state of bus
CSB to WRB
CSB to RDB
WR to data
WR to Dy asserted
RD to Rdy asserted
Rdyb to WRB
Rdyb to RDB
Data valid setup time
Data valid hold time
RdyB to CSB
master clock timing : cf specifications
Setup time according to the master clock
Setup time according to the master clock
T
avs
T
T
alew
ale2cs
T
cs2rd
Parameters
T
T
ale2Z
avh
T
rd2Mclk
T
rd2rdy
T
csre
T
wrw
Minimum
1/2 Tmclk
12
10
10
10
10
10
0
0
0
0
0
0
T
dvs
T
rdy2rd
T
rdy2cs
Maximum
Tmclk
T
900
T
dvh
50
15
60
60
mclk
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s

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