P80C32X2BBD NXP Semiconductors, P80C32X2BBD Datasheet - Page 53

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P80C32X2BBD

Manufacturer Part Number
P80C32X2BBD
Description
MCU 8-Bit 80C 80C51 CISC ROMLess 5V 44-Pin LQFP Tray
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P80C32X2BBD

Package
44LQFP
Device Core
80C51
Family Name
80C
Maximum Speed
33 MHz
Ram Size
256 Byte
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
ROMLess
Number Of Programmable I/os
32
Interface Type
UART
Operating Temperature
0 to 70 °C
Number Of Timers
3

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Table 11) is programmed, MOVC instructions executed from external
internal memory, EA is latched on Reset and all further programming
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
MASK ROM DEVICES
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. If the encryption table is programmed, the
code will be encrypted when verified. When only security bit 1 (see
program memory are disabled from fetching code bytes from the
Table 11. Program Security Bits
NOTES:
80C51X2 ROM CODE SUBMISSION
When submitting a ROM code for the 80C51X2, the following must be specified:
1. 4 kbyte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
80C52X2 ROM CODE SUBMISSION
When submitting a ROM code for the 80C52X2, the following must be specified:
1. 8 kbyte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
2003 Jan 24
PROGRAM LOCK BITS
80C51 8-bit microcontroller family
4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),
low power, high speed (30/33 MHz)
ADDRESS
0000H to 0FFFH
1000H to 103FH
1040H
1040H
Security Bit #1:
Security Bit #2:
Encryption:
1
2
SB1
U
P
SB2
U
U
1, 2
Enabled
Enabled
No
PROTECTION DESCRIPTION
No Program Security features enabled.
(Code verify will still be encrypted by the Encryption Array if programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes from
internal memory, EA is sampled and latched on Reset, and further programming of the EPROM is disabled.
CONTENT
DATA
KEY
SEC
SEC
Disabled
Disabled
Yes
If Yes, must send key file.
53
BIT(S)
7:0
7:0
0
1
of the EPROM is disabled. When security bits 1 and 2 are
programmed, in addition to the above, verify mode is disabled.
Encryption Array
64 bytes (87C51), or 32 bytes (87C52/4) of encryption array are
initially unprogrammed (all 1s).
P80C3xX2; P80C5xX2;
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
P87C5xX2
Product data

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