NUC130VE3CN Nuvoton Technology Corporation of America, NUC130VE3CN Datasheet - Page 282

• Manufacturer Part Number: NUC130VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Byte Reorder
When the transfer is set as MSB first (LSB = 0) and the REORDER is enabled, the data stored in
the TX buffer and RX buffer will be rearranged in the order as [BYTE0, BYTE1, BYTE2, BYTE3]
in TX_BIT_LEN = 32-bit mode, and the sequence of transmitted/received data will be BYTE0,
BYTE1, BYTE2, and then BYTE3. If the TX_BIT_LEN is set as 24-bit mode, the data in TX buffer
and RX buffer will be rearranged as [unknown byte, BYTE0, BYTE1, BYTE2]. The SPI controller
will transmit/receive data with the sequence of BYTE0, BYTE1 and then BYTE2. Each byte will be
transmitted/received with MSB first. The rule of 16-bit mode is the same as above. Byte reorder
function is only available when TX_BIT_LEN is configured as 16, 24, and 32 bits.
Byte3
MSB first
NuMicro™ NUC130/NUC140 Technical Reference Manual
SPI_TX0/SPI_RX0
Byte2
Byte1
Byte0
Figure 5-56 Byte Reorder
& REORDER = 2'b10/2'b01
LSB = 0 (MSB first)
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Publication Release Date: June 14, 2011
Byte0 Byte1 Byte2
nn
nn
MSB first
TX_BIT_LEN = 32 bits
TX_BIT_LEN = 24 bits
TX_BIT_LEN = 16 bits
TX/RX Buffer
Byte0
nn
MSB first
nn = unknown byte
Byte1
Byte0
Revision V2.01
MSB first
Byte3
Byte2
Byte1