NUC130VE3CN Nuvoton Technology Corporation of America, NUC130VE3CN Datasheet - Page 294

• Manufacturer Part Number: NUC130VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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NuMicro™ NUC130/NUC140 Technical Reference Manual
FIFO
REORDER
SLAVE
IE
IF
SP_CYCLE
1 = Enable two-bit transfer mode.
0 = Disable two-bit transfer mode.
Note that when enable TWOB, the serial transmitted 2-bit data output are from
SPI_TX1/0, and the received 2-bit data input are put in SPI_RX1/0.
Note that when enable TWOB, the setting of TX_NUM must be programmed as 0x00
FIFO Mode
1 = Enable FIFO Mode
0 = Disable FIFO Mode
Note:
1.
2.
3.
Reorder Mode Select
00 = Disable both byte reorder and byte suspend functions.
01 = Enable byte reorder function and insert a byte suspend interval (2~17 SPICLK
10 = Enable byte reorder function, but disable byte suspend function.
11 = Disable byte reorder function, but insert a suspend interval (2~17 SPICLK cycles)
Note:
1.
2.
Slave Mode Indication
1 = Slave mode
0 = Master mode
Interrupt Enable
1 = Enable SPI Interrupt
0 = Disable SPI Interrupt
Interrupt Flag
1 = It indicates that the transfer is done.
0 = It indicates that the transfer dose not finish yet.
Note: This bit will be cleared by writing 1 to itself.
Suspend Interval (Master Only)
These four bits provide configurable suspend interval between two successive
transmit/receive transaction in a transfer. The suspend interval is from the last falling
clock edge of the current transaction to the first rising clock edge of the successive
transaction if CLKP = 0. If CLKP = 1, the interval is from the rising clock edge to the
falling clock edge. The default value is 0x0. When TX_NUM = 00b, setting this field has
no effect on transfer. The desired suspend interval is obtained according to the
following equation:
Before enabling FIFO mode, the other related settings should be set in advance.
In slave mode with level-trigger configuration, the slave select pin must be kept at
active state during the successive data transfer.
In FIFO mode, both the REORDER field and the TX_NUM field must be
configured as 0. In other words, the byte-reorder function, byte suspend function
and burst mode must be disable.
cycles) among each byte. The setting of TX_BIT_LEN must be configured as
0x00. (32 bits/word)
among each byte. The setting of TX_BIT_LEN must be configured as 0x00. (32
bits/word)
Byte reorder function is only available if TX_BIT_LEN is defined as 16, 24, and 32
bits.
In slave mode with level-trigger configuration, if the byte suspend function is
enabled, the slave select pin must be kept at active state during the successive
four bytes transfer.
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Publication Release Date: June 14, 2011
Revision V2.01