LPC2106FHN48/01-S NXP Semiconductors, LPC2106FHN48/01-S Datasheet - Page 29

• Manufacturer Part Number: LPC2106FHN48/01-S
• Description: MCU 16-Bit/32-Bit LPC2000 ARM7TDMI-S RISC 128KB Flash 1.8V/3.3V 48-Pin HVQFN EP Tray
• Manufacturer: NXP Semiconductors

Specifications of LPC2106FHN48/01-S

• Package: 48HVQFN EP
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 60 MHz
• Ram Size: 64 KB
• Program Memory Size: 128 KB
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 16|32 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 32
• Interface Type: I2C/SPI/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 2

NXP Semiconductors
Table 9.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Applies to P0[31:22].
[11] SPI is enabled and SSP is disabled in the PCONP register ( see LPC2104/2105/2106 user manual ).
[12] To V
LPC2104_2105_2106_7
Product data sheet
Symbol
Oscillator pins
V
V
amb
i(XTAL1)
o(XTAL2)
Typical ratings are not guaranteed. The values listed are at room temperature (+25 C), nominal supply voltages.
Internal rail.
External rail.
Including voltage on outputs in 3-state mode.
V
3-state outputs go into 3-state mode when V
Accounts for 100 mV voltage drop in all supply lines.
Allowed as long as the current limit does not exceed the maximum current allowed by the device.
Minimum condition for V
= 0 C to +70 C for commercial applications, unless otherwise specified.
DD(3V3)
SS
.
Parameter
input voltage on pin XTAL1
output voltage on pin
XTAL2
Static characteristics
supply voltages must be present.
8.1 Power consumption measurements for LPC2104/2105/2106/01
The power consumption measurements represent typical values for the given conditions.
The peripherals were enabled through the PCONP register, but for these measurements
the peripherals were not configured to run. Power measurements with all peripherals
enabled were performed with the SPI enabled and the SSP disabled. Peripherals were
disabled through the PCONP register. Refer to the LPC2104/2105/2106 User Manual for a
description of the PCONP register.
I
Fig 5.
= 4.5 V, maximum condition for V
I
DD(act)
(mA)
…continued
60
40
20
Test conditions: Active mode entered executing code from on-chip flash; PCLK =
T
Typical LPC2104/2105/2106/01 I
0
amb
12
= 25 C; core voltage 1.8 V.
Conditions
DD(3V3)
is grounded.
Rev. 07 — 20 June 2008
I
= 5.5 V.
28
all peripherals disabled
all peripherals enabled
DD(act)
measured at different frequencies
Min
0
0
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
44
frequency (MHz)
Typ
-
-
[1]
002aad709
© NXP B.V. 2008. All rights reserved.
Max
1.8
1.8
CCLK
60
4
;
29 of 41
Unit
V
V