STM32F407VET6 STMicroelectronics, STM32F407VET6 Datasheet - Page 31

• Manufacturer Part Number: STM32F407VET6
• Description: Microcontrollers (MCU) ARM M4 512 FLASH 168 Mhz 192kB SRAM
• Manufacturer: STMicroelectronics

Specifications of STM32F407VET6

• Core: ARM Cortex M4
• Processor Series: STM32F4
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 168 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 192 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 82
• Number Of Timers: 10
• Operating Supply Voltage: 1.7 V to 3.6 V
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 16
• Interface Type: CAN, I2C, I2S, SPI, UART
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

STM32F405xx, STM32F407xx
2.2.21
2.2.22
SysTick timer
This timer is dedicated to real-time operating systems, but could also be used as a standard
downcounter. It features:
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Inter-integrated circuit interface (I²C)
Up to three I²C bus interfaces can operate in multimaster and slave modes. They can
support the Standard- and Fast-modes. They support the 7/10-bit addressing mode and the
7-bit dual addressing mode (as slave). A hardware CRC generation/verification is
embedded.
They can be served by DMA and they support SMBus 2.0/PMBus.
Universal synchronous/asynchronous receiver transmitters (USART)
The STM32F405xx and STM32F407xx embed four universal synchronous/asynchronous
receiver transmitters (USART1, USART2, USART3 and USART6) and two universal
asynchronous receiver transmitters (UART4 and UART5).
These six interfaces provide asynchronous communication, IrDA SIR ENDEC support,
multiprocessor communication mode, single-wire half-duplex communication mode and
have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to
communicate at speeds of up to 10.5 Mbit/s. The other available interfaces communicate at
up to 5.25 bit/s.
USART1, USART2, USART3 and USART6 also provide hardware management of the CTS
and RTS signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication
capability. All interfaces can be served by the DMA controller.
A 24-bit downcounter
Autoreload capability
Maskable system interrupt generation when the counter reaches 0
Programmable clock source.
Doc ID 022152 Rev 2
Description
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