IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 8

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

List of Figures
Figure-1 Functional Block Diagram ............................................................................................................................................................................ 12
Figure-2 416-Pin PBGA (Top View) ........................................................................................................................................................................... 13
Figure-3 Switch between Impedance Matching Modes .............................................................................................................................................. 24
Figure-4 Receive Differential Line Interface with Twisted Pair Cable (with transformer) ........................................................................................... 25
Figure-5 Receive Differential Line Interface with Coaxial Cable (with transformer) ................................................................................................... 25
Figure-6 Receive Differential Line Interface with Twisted Pair Cable (transformer-less, non standard compliant) .................................................... 26
Figure-7 Receive Single Ended Line Interface with Coaxial Cable (with transformer) ............................................................................................... 26
Figure-8 Receive Single Ended Line Interface with Coaxial Cable (transformer-less, non standard compliant) ....................................................... 26
Figure-9 Receive Path Monitoring .............................................................................................................................................................................. 27
Figure-10 Transmit Path Monitoring ............................................................................................................................................................................ 27
Figure-11 DSX-1 Waveform Template ........................................................................................................................................................................ 30
Figure-12 T1 Waveform Template Measurement Circuit ............................................................................................................................................. 30
Figure-13 E1 Waveform Template ............................................................................................................................................................................... 31
Figure-14 E1 Waveform Template Measurement Circuit ............................................................................................................................................ 31
Figure-15 Transmit Differential Line Interface with Twisted Pair Cable (with Transformer) ........................................................................................ 35
Figure-16 Transmit Differential Line Interface with Coaxial Cable (with transformer) ................................................................................................. 35
Figure-17 Transmit Differential Line Interface with Twisted Pair Cable (transformer-less, non standard compliant) .................................................. 35
Figure-18 Transmit Single Ended Line Interface with Coaxial Cable (with transformer) ............................................................................................. 35
Figure-19 Jitter Attenuator ........................................................................................................................................................................................... 37
Figure-20 LLOS Indication on Pins .............................................................................................................................................................................. 39
Figure-21 TLOS Detection Between Two Channels .................................................................................................................................................... 41
Figure-22 Pattern Generation (1) ................................................................................................................................................................................. 43
Figure-23 Pattern Generation (2) ................................................................................................................................................................................. 43
Figure-24 PRBS / ARB Detection ................................................................................................................................................................................ 44
Figure-25 IB Detection ................................................................................................................................................................................................. 45
Figure-26 Automatic Error Counter Updating .............................................................................................................................................................. 46
Figure-27 Manual Error Counter Updating .................................................................................................................................................................. 46
Figure-28 Priority Of Diagnostic Facilities During Analog Loopback ........................................................................................................................... 49
Figure-29 Priority Of Diagnostic Facilities During Manual Remote Loopback ............................................................................................................. 50
Figure-30 Priority Of Diagnostic Facilities During Digital Loopback ............................................................................................................................ 51
Figure-31 Priority Of Diagnostic Facilities During Manual Remote Loopback + Manual Digital Loopback ................................................................. 53
Figure-32 Priority Of Diagnostic Facilities During Manual Remote Loopback + Automatic Digital Loopback ............................................................. 53
Figure-33 G.772 Monitoring ......................................................................................................................................................................................... 54
Figure-34 Automatic JM Updating ............................................................................................................................................................................... 55
Figure-35 Manual JM Updating ................................................................................................................................................................................... 55
Figure-36 REFA Output Options in Normal Operation ................................................................................................................................................ 58
Figure-37 REFB Output Options in Normal Operation ................................................................................................................................................ 59
Figure-38 REFA Output in LLOS Condition (When RCLKn Is Selected) ..................................................................................................................... 59
Figure-39 REFA Output in No CLKA Condition (When CLKA Is Selected) ................................................................................................................. 60
Figure-40 Interrupt Service Process ............................................................................................................................................................................ 63
Figure-41 Reset ........................................................................................................................................................................................................... 64
Figure-42 1+1 HPS Scheme, Differential Interface (Shared Common Transformer) .................................................................................................. 66
Figure-43 1:1 HPS Scheme, Differential Interface (Individual Transformer) ............................................................................................................... 67
Figure-44 1+1 HPS Scheme, E1 75 ohm Single-Ended Interface (Shared Common Transformer) ........................................................................... 68
Figure-45 JTAG Architecture ..................................................................................................................................................................................... 113
Figure-46 JTAG State Diagram ................................................................................................................................................................................. 114
Figure-47 Transmit Clock Timing Diagram ................................................................................................................................................................ 126
Figure-48 Receive Clock Timing Diagram ................................................................................................................................................................. 126
List of Figures
8
February 6, 2009