DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 3

• Manufacturer Part Number: DS3170N+
• Description: IC TXRX DS3/E3 100-CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3170N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 120mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

10.3 R
10.4 G
10.5 P
10.6 DS3/E3 F
10.7 HDLC O
10.8 T
10.9 FEAC C
10.10 L
10.2.3 Line IO Pin Timing Source Selection ............................................................................................... 59
10.2.4 Clock Structures On Signal IO Pins ................................................................................................. 62
10.2.5 Gapped Clocks ............................................................................................................................... 63
10.4.1 Clock Rate Adapter (CLAD) ............................................................................................................ 66
10.4.2 8 kHz Reference Generation ........................................................................................................... 66
10.4.3 One Second Reference Generation................................................................................................. 67
10.4.4 General-Purpose IO Pins ................................................................................................................ 68
10.4.5 Performance Monitor Counter Update Details ................................................................................. 69
10.4.6 Transmit Manual Error Insertion ...................................................................................................... 70
10.5.1 Loopbacks ...................................................................................................................................... 71
10.5.2 Loss Of Signal Propagation ............................................................................................................. 73
10.5.3 AIS Logic ........................................................................................................................................ 73
10.5.4 Loop Timing Mode .......................................................................................................................... 75
10.5.5 HDLC Overhead Controller ............................................................................................................. 75
10.5.6 Trail Trace ...................................................................................................................................... 75
10.5.7 BERT .............................................................................................................................................. 75
10.5.8 System Port Pins ............................................................................................................................ 76
10.5.9 Framing Modes ............................................................................................................................... 77
10.5.10 Line Interface Modes....................................................................................................................... 77
10.6.1 General Description ........................................................................................................................ 79
10.6.2 Features ......................................................................................................................................... 79
10.6.3 Transmit Formatter ......................................................................................................................... 80
10.6.4 Receive Framer .............................................................................................................................. 80
10.6.5 C-bit DS3 Framer/Formatter ............................................................................................................ 84
10.6.6 M23 DS3 Framer/Formatter ............................................................................................................ 87
10.6.7 G.751 E3 Framer/Formatter ............................................................................................................ 89
10.6.8 G.832 E3 Framer/Formatter ............................................................................................................ 91
10.7.1 General Description ........................................................................................................................ 96
10.7.2 Features ......................................................................................................................................... 97
10.7.3 Transmit FIFO ................................................................................................................................. 97
10.7.4 Transmit HDLC Overhead Processor .............................................................................................. 98
10.7.5 Receive HDLC Overhead Processor ............................................................................................... 98
10.7.6 Receive FIFO.................................................................................................................................. 99
10.8.1 General Description ........................................................................................................................ 99
10.8.2 Features ....................................................................................................................................... 100
10.8.3 Functional Description ................................................................................................................... 100
10.8.4 Transmit Data Storage .................................................................................................................. 101
10.8.5 Transmit Trace ID Processor ......................................................................................................... 101
10.8.6 Transmit Trail Trace Processing .................................................................................................... 101
10.8.7 Receive Trace ID Processor.......................................................................................................... 101
10.8.8 Receive Trail Trace Processing ..................................................................................................... 101
10.8.9 Receive Data Storage ................................................................................................................... 102
10.9.1 General Description ...................................................................................................................... 102
10.9.2 Features ....................................................................................................................................... 103
10.9.3 Functional Description ................................................................................................................... 103
10.10.1 General Description ...................................................................................................................... 104
10.10.2 Features ....................................................................................................................................... 105
10.10.3 B3ZS/HDB3 Encoder .................................................................................................................... 105
10.10.4 Transmit Line Interface ................................................................................................................. 105
10.10.5 Receive Line Interface .................................................................................................................. 106
10.10.6 B3ZS/HDB3 Decoder .................................................................................................................... 106
INE
RAIL
ORT
ESET AND
LOBAL
E
R
T
NCODER
RACE
ESOURCES
R
ONTROLLER
VERHEAD
ESOURCES
RAMER
P
OWER
C
/D
ONTROLLER
ECODER
/ F
C
................................................................................................................................... 71
-D
ORMATTER
ONTROLLER
.............................................................................................................................. 102
............................................................................................................................... 66
OWN
....................................................................................................................... 104
....................................................................................................................... 63
....................................................................................................................... 99
................................................................................................................. 79
............................................................................................................... 96
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DS3170 DS3/E3 Single-Chip Transceiver