DS3170N+ Maxim Integrated Products, DS3170N+ Datasheet - Page 89

• Manufacturer Part Number: DS3170N+
• Description: IC TXRX DS3/E3 100-CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3170N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 120mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

10.6.6.5.1 Receive M23 DS3 Frame Format
The DS3 frame format is shown in
referred to as the far-end SEF/AIS bits). P
are the multiframe alignment bits that define the multiframe boundary. F
define the subframe boundary. Note: Both the M-bits and F-bits define the DS3 frame boundary. C
Application Identification Channel (AIC). C
10.6.6.5.2 Receive M23 DS3 Overhead Extraction
Overhead extraction extracts all of the DS3 overhead bits from the M23 DS3 frame. All of the DS3 overhead bits
X
P
10.6.6.5.3 Receive DS3 Downstream AIS Generation
Downstream DS3 AIS (all ‘1’s) can be automatically generated on an OOF, LOS, or AIS condition or manually
inserted. If automatic downstream AIS is enabled, downstream AIS is inserted when an LOS or AIS condition is
declared, or no earlier than 2.25 ms and no later than 2.75 ms after an OOF condition is declared. Automatic
downstream AIS is programmable (on or off). If manual downstream AIS insertion is enabled, downstream AIS is
inserted. Manual downstream AIS insertion is programmable (on or off). Downstream AIS is removed when all
OOF, LOS, and AIS conditions are terminated and manual downstream AIS insertion is disabled.
10.6.7 G.751 E3 Framer/Formatter
10.6.7.1 Transmit G.751 E3 Frame Processor
The G.751 E3 frame format is shown in
bit used to indicate the presence of an alarm to the remote terminal equipment. N is the National use bit reserved
for national use.
Figure 10-16. G.751 E3 Frame Format
10.6.7.2 Transmit G.751 E3 Frame Generation
G.751 E3 frame generation receives the incoming payload data stream, and overwrites all of the E3 overhead bit
locations.
The first ten bits of the frame are overwritten with the frame alignment signal (FAS) which has a value of
1111010000b.
The eleventh bit of the frame is overwritten with the alarm indication (A) bit. The A bit can be generated
automatically, sourced from the transmit FEAC controller, set to one, or set to zero. The A bit source is
programmable (automatic, FEAC, 1, or 0). If the A bit is generated automatically, it is set to one when one or more
of the indicated alarm conditions is present, and set to zero when all of the indicated alarm conditions are absent.
Automatically setting RDI on LOS, LOF, or AIS is individually programmable (on or off).
The twelfth bit of the frame is overwritten with the national use (N) bit. The N bit can be sourced from the transmit
FEAC controller, sourced from the transmit HDLC overhead controller, set to one, or set to zero. The N bit source
is programmable (FEAC, HDLC, 1, or 0). Note: The FEAC controller will source one bit per frame regardless of
whether the A bit only, the N bit only, or both are programmed to be sourced from the FEAC controller.
1
1
, X
and P
FAS
2
, P
1
2
, P
bits are output as an error indication (modulo 2 addition of the calculated parity and the bit).
2
, M
A N
X
, F
XY
, and C
XY
are output on the receive overhead interface (ROH, ROHSOF, and ROHCLK). The
Figure
1524 Bit Payload
Figure
X1
1
384 bits
10-13. The X
and P
, C
X2
10-16. FAS is the Frame Alignment Signal. A is the Alarm indication
, and C
2
are the parity bits used for line error monitoring. M
89 of 230
X3
1
and X
are the stuff control bits for tributary #X.
2
are the Remote Defect Indication (RDI) bits (also
DS3170 DS3/E3 Single-Chip Transceiver
XY
are the subframe alignment bits that
4 Rows
1
, M
2
11
, and M
is the
3