DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 179

• Manufacturer Part Number: DS21Q55
• Description: IC TXRX QUAD T1/E1/J1 SCT 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55

• Function: Transceiver
• Interface: E1, J1, T1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Includes: BERT Generator and Detector, Dual HDLC Controllers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

24.4 BERT Repetitive Pattern Set
These registers must be properly loaded for the BERT to generate and synchronize to a repetitive pattern,
a pseudorandom pattern, alternating word pattern, or a Daly pattern. For a repetitive pattern that is fewer
than 32 bits, the pattern should be repeated so that all 32 bits are used to describe the pattern. For
example, if the pattern was the repeating 5-bit pattern …01101… (where the rightmost bit is the one sent
first and received first), then BRP1 should be loaded with ADh, BRP2 with B5h, BRP3 with D6h, and
BRP4 with 5Ah. For a pseudorandom pattern, all four registers should be loaded with all 1s (i.e., FFh).
For an alternating word pattern, one word should be placed into BRP1 and BRP2 and the other word
should be placed into BRP3 and BRP4. For example, if the DDS stress pattern “7E” is to be described,
the user would place 00h in BRP1, 00h in BRP2, 7Eh in BRP3, and 7Eh in BRP4 and the alternating
word counter would be set to 50 (decimal) to allow 100 bytes of 00h followed by 100 bytes of 7Eh to be
sent and received.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Repetitive Pattern Set Bits 0 to 7 (RPAT0 to RPAT7). RPAT0 is the LSB of the 32-bit
repetitive pattern set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Repetitive Pattern Set Bits 8 to 15 (RPAT8 to RPAT15)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Repetitive Pattern Set Bits 16 to 23 (RPAT16 to RPAT23)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 7/BERT Repetitive Pattern Set Bits 24 to 31 (RPAT24 to RPAT31). RPAT31 is the LSB of the 32-bit
repetitive pattern set.
RPAT7
RPAT15
RPAT23
RPAT31
7
0
7
0
7
0
7
0
RPAT6
RPAT14
RPAT22
RPAT30
BRP1
BERT Repetitive Pattern Set Register 1
DCh
BRP2
BERT Repetitive Pattern Set Register 2
DDh
BRP3
BERT Repetitive Pattern Set Register 3
DEh
BRP4
BERT Repetitive Pattern Set Register 4
DFh
6
0
6
0
6
0
6
0
RPAT5
RPAT13
RPAT21
RPAT29
5
0
0
0
0
5
5
5
RPAT4
4
0
RPAT12
RPAT20
RPAT28
179 of 237
4
0
4
0
4
0
RPAT3
0
3
RPAT11
RPAT19
RPAT27
3
0
3
0
3
0
RPAT2
2
0
RPAT26
RPAT10
RPAT18
2
0
2
0
2
0
RPAT1
1
0
RPAT25
RPAT17
RPAT9
1
0
RPAT0
1
0
1
0
0
0
RPAT24
RPAT8
RPAT16
0
0
0
0
0
0