DS21Q55 Maxim Integrated Products, DS21Q55 Datasheet - Page 196

• Manufacturer Part Number: DS21Q55
• Description: IC TXRX QUAD T1/E1/J1 SCT 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55

• Function: Transceiver
• Interface: E1, J1, T1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Includes: BERT Generator and Detector, Dual HDLC Controllers
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive Gapped-Clock Enable (RGPCKEN)
Bit 1/Receive Channel-Data Format (RDATFMT)
Bit 2/Transmit Gapped-Clock Enable (TGPCKEN)
Bit 3/Transmit Channel-Data Format (TDATFMT)
Bit 4/ Unused, must be set to 0 for proper operation
Bit 5/ Unused, must be set to 0 for proper operation
Bit 6/Interrupt Disable (INTDIS). This bit is convenient for disabling interrupts without altering the various
interrupt mask register settings.
Bit 7/Transmit Multiframe Sync Source (TMSS). Should be set = 0 only when transmit hardware signaling is
enabled.
0 = RCHCLK functions normally
1 = enable gapped bit-clock output on RCHCLK
0 = 64kbps (data contained in all 8 bits)
1 = 56kbps (data contained in seven out of the 8 bits)
0 = TCHCLK functions normally
1 = enable gapped bit-clock output on TCHCLK
0 = 64kbps (data contained in all 8 bits)
1 = 56kbps (data contained in seven out of the 8 bits)
0 = interrupts are enabled according to the various mask register settings
1 = interrupts are disabled regardless of the mask register settings
0 = elastic store is source of multiframe sync
1 = framer or TSYNC pin is source of multiframe sync
TMSS
7
0
INTDIS
6
0
CCR3
Common Control Register 3
72h
CTTUI
5
0
CRRUI
4
0
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TDATFMT
3
0
TGPCKEN
2
0
RDATFMT
1
0
RGPCKEN
0
0