SC16IS750IBS,151 NXP Semiconductors, SC16IS750IBS,151 Datasheet - Page 22

IC UART I2C/SPI 24-HVQFN

SC16IS750IBS,151

Manufacturer Part Number
SC16IS750IBS,151
Description
IC UART I2C/SPI 24-HVQFN
Manufacturer
NXP Semiconductors
Type
IrDA or RS- 232 or RS- 485r
Datasheet

Specifications of SC16IS750IBS,151

Number Of Channels
1, UART
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Features
Low Current
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Supply Current
6 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.5 V or 3.3 V
Transmit Fifo
64Byte
Receive Fifo
64Byte
Transmitter And Receiver Fifo Counter
No
Operating Supply Voltage (max)
3.6V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2234
935279271151
SC16IS750IBS-S
Table 10.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Enhanced Feature Registers are only accessible when LCR = 0xBF.
Register
address
Special register set
0x00
0x01
Enhanced register set
0x02
0x04
0x05
0x06
0x07
These registers are accessible only when LCR[7] = 0.
These bits in can only be modified if register bit EFR[4] is enabled.
These bits are reserved and should be set to 0.
Only available on the SC16IS750/SC16IS760.
After Receive FIFO or Transmit FIFO reset (through FCR[1:0]), the user must wait at least 2
Burst reads on the serial interface (that is, reading multiple elements on the I
without de-asserting the CS pin), should not be performed on the IIR register.
These registers are accessible only when MCR[2] = 1 and EFR[4] = 1.
IrDA mode slow/fast for SC16IS760, slow only for SC16IS750.
The special register set is accessible only when LCR[7] = 1 and not 0xBF.
SC16IS740/750/760 internal registers
Register
DLL
DLH
EFR
XON1
XON2
XOFF1
XOFF2
[9]
[10]
Bit 7
bit 7
bit 7
Auto CTS
bit 7
bit 7
bit 7
bit 7
Bit 6
bit 6
bit 6
Auto RTS
bit 6
bit 6
bit 6
bit 6
…continued
Bit 5
bit 5
bit 5
special
character
detect
bit 5
bit 5
bit 5
bit 5
Bit 4
bit 4
bit 4
enable
enhanced
functions
bit 4
bit 4
bit 4
bit 4
2
C-bus without a STOP or repeated START condition, or reading multiple elements on the SPI bus
Bit 3
bit 3
bit 3
software flow
control bit 3
bit 3
bit 3
bit 3
bit 3
T
clk
of XTAL1 before reading or writing data to RHR and THR, respectively.
Bit 2
bit 2
bit 2
software flow
control bit 2
bit 2
bit 2
bit 2
bit 2
Bit 1
bit 1
bit 1
software flow
control bit 1
bit 1
bit 1
bit 1
bit 1
Bit 0
bit 0
bit 0
software flow
control bit 0
bit 0
bit 0
bit 0
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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