SC16IS750IBS,157 NXP Semiconductors, SC16IS750IBS,157 Datasheet - Page 11

IC UART 64BYTE 24HVQFN

SC16IS750IBS,157

Manufacturer Part Number
SC16IS750IBS,157
Description
IC UART 64BYTE 24HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16IS750IBS,157

Features
Low Current
Number Of Channels
1, UART
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935279271157
SC16IS750IBS
SC16IS750IBS
NXP Semiconductors
SC16IS740_750_760_6
Product data sheet
Fig 10. CTS functional timing
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) When CTS goes HIGH before the middle of the last stop bit of the current character, the transmitter finishes sending the current
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
character, but it does not send the next character.
7.2.2 Auto CTS
CTS
TX
7.3 Software flow control
Figure 10
sending the next data byte. When CTS is active, the transmitter sends the next byte. To
stop the transmitter from sending the following byte, CTS must be deasserted before the
middle of the last stop bit that is currently being sent. The auto CTS function reduces
interrupts to the host system. When flow control is enabled, CTS level changes do not
trigger host interrupts because the device automatically controls its own transmitter.
Without auto CTS, the transmitter sends any data present in the transmit FIFO and a
receiver overrun error may result.
Software flow control is enabled through the enhanced feature register and the Modem
Control Register. Different combinations of software flow control can be enabled by setting
different combinations of EFR[3:0].
Table 3.
EFR[3]
0
1
0
1
X
X
X
1
0
1
0
shows CTS functional timing. The transmitter circuitry checks CTS before
start
EFR[2]
0
0
1
1
X
X
X
0
1
1
0
Software flow control options (EFR[3:0])
bit 0 to bit 7
EFR[1]
X
X
X
X
0
1
0
1
1
1
1
Single UART with I
Rev. 06 — 13 May 2008
stop
EFR[0]
X
X
X
X
0
0
1
1
1
1
1
Table 3
2
TX, RX software flow control
no transmit flow control
transmit Xon1, Xoff1
transmit Xon2, Xoff2
transmit Xon1 and Xon2, Xoff1 and Xoff2
no receive flow control
receiver compares Xon1, Xoff1
receiver compares Xon2, Xoff2
transmit Xon1, Xoff1
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon2, Xoff2
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon1 and Xon2, Xoff1 and Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
no transmit flow control
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
shows software flow control options.
SC16IS740/750/760
start
bit 0 to bit 7
002aab041
stop
© NXP B.V. 2008. All rights reserved.
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