TDA7572TR STMicroelectronics, TDA7572TR Datasheet

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PWM amplifier with built-in step-up converter Features ■ Input stage and gain compressor ■ Over-modulation protection and current limiting ■ Modulator ■ DAC ■ Step-up ■ Mode control ■ Diagnostics / safety ■ Power control Description TDA7572 ...

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Contents Contents 1 Detailed features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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TDA7572 6.2 Gain compressor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Contents 14.3 THD+N step- ...

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TDA7572 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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TDA7572 1 Detailed features ● Input Stage and Gain Compressor – Differential, high CMRR, analog input – Programmable input attenuation/gain to support up to four drive levels – Noiseless Gain compression with programmable attack and ...

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Interface description 2 Interface description bus and mode control pins are use to control operation. Default values of all the operating modes are deterministic, some of these values are intrinsic to the IC and some are determined ...

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TDA7572 3 Pins description Figure 2. Pins connection (top view) 1 Iset 2 TestC 3 LSD2SS 4 LSD2GD 5 LSD2GS 6 HB2OutFilt 7 HB2Out 8 HSD2GS 9 HSD2GD HSD2SS 10 VSP_POW2 11 12 VSP_POW1 13 HSD1SS 14 HSD1GD HSD1GS 15 ...

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Pins description Table 2. Pin list by argument Pin # Pin name On/Off Circuitry 11 VSP_POW2 53 VP2.5 51 VM2.5 50 VDIG 49 DGND 52 SVR 55 Mode0 54 Mode1 57 MUTE_L 56 AutoMuteVSetting Input/ Gain Compressor 34 INP 33 ...

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TDA7572 Table 2. Pin list by argument (continued) Pin # Pin name 39 MOD2 10 HSD2SS 9 HSD2GD 8 HSD2GS 7 HB2Out 6 HB2OutFilt 5 LSD2GS 4 LSD2GD 3 LSD2SS 27 VSM1 26 VSM2 58 VSM3 59 VSM4 43 ShuntDriver ...

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Pins description Table 2. Pin list by argument (continued) Pin # Pin name 61 ADDR0/Fault/Clip_L 60 ADDR1/CompEnable 48 NTC 2 TestC 1 ISet 30 ISSENP 29 ISSENM DAC Clip_L 45 SDA/SCR_ENB 47 SCL/ InLevel1 44 PLL/InLevel0 31 ...

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TDA7572 Table 3. Pin list by pin (continued) Pin # Pin name 16 HB1Out 17 HB1OutFilt 18 LSD1GS 19 LSD1GD 20 LSD1SS 21 BSTGate 22 BSTSource 23 CSense 24 V14Sense 25 V14 26 VSM2 27 VSM1 28 BSTVSense 29 ISSENM ...

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Pins description Table 3. Pin list by pin (continued) Pin # Pin name 49 DGND 50 VDIG 51 VM2.5 52 SVR 53 VP2.5 54 Mode1 55 Mode0 56 AutoMuteVSetting 57 MUTE_L 58 VSM3 59 VSM4 60 ADDR1/CompEnable 61 ADDR0/Fault/Clip_L 2 ...

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TDA7572 4 Electrical specifications 4.1 Absolute maximum ratings Table 4. Absolute maximum ratings Symbol Parameters V Supply voltage SP V Peak supply voltage peak V Data pin voltage DATA T Junction temperature J T Storage temperature Stg P Power Dissipation ...

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Electrical specifications Table 6. Operating voltage and current (continued) Symbol Parameters Operating voltage SPLIT V split supply rails SM I Stand-by current stdby I Tristate current tristate I Mute mode current MUTE 4.3.2 Under voltage lockout Table ...

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TDA7572 Table 7. Under voltage lockout (continued) Symbol Parameters V14 – UVLO Auto-tristate supply V14- voltage V14 negative slope Auto-tristate supply V14+ voltage V14 positive slope Auto-tristate 14V voltage V14h hysteresis V14su Step-up tristate Auto-mute supply V14mute- voltage V14 negative ...

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Electrical specifications 4.3.3 Input stage Table 8. Input stage Symbol Parameters Input diff. amp./ gain attenuator R IN, No compress ion Input resistance R max IN compress ion Input clipping level Voltage level of the input V InMax that trespassed ...

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TDA7572 Table 8. Input stage Symbol Parameters Output slew rate AOUT clip detector f Frequency response -3dB Common Mode Rejection CMRR Ratio CG Common gain CG Common gain CG Common gain CG Common gain Power Supply Rejection, PSRR Vsp supply ...

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Electrical specifications Table 8. Input stage Symbol Parameters Attenuation step size Gain Change ZC comparator offset (in the diff. – S.E. block) offset Gain Change ZC comparator offset (in the diff. – S.E. block) offset Mute Mute attenuation Charge current ...

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TDA7572 4.3.4 Oscillator Table 9. Oscillator Symbol Parameters Internal oscillator F Switching frequency PWM_NOM CLK Duty cycle DC V Maximum voltage level CLK_High V Minimum voltage level CLK_Low V Peak-peak voltage CLK-P-P Dither cap charge current Dither pin voltage= 2.5V ...

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Electrical specifications 4.3.5 Modulator Table 10. Modulator Symbol Parameters Integrator op. amp. Int_Voff Input offset voltage Int_ibias Input bias current T Maximum duty cycle off 4.3.6 Gate drive and output stage control Table 11. Gate drive and output stage control ...

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TDA7572 Table 11. Gate drive and output stage control (continued) Symbol Parameters NFET gate voltage that will NV GS_ON block PFET enhancement NFET gate voltage that will NV GS_OFF allow PFET enhancement 4.3.7 Diagnostics Table 12. Diagnostics Symbol Parameters Turn-on ...

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Electrical specifications Table 12. Diagnostics (continued) Symbol Parameters Ext thermal shut down Ext thermal shut down hysteresis Supply I sense Supply sense trip voltage AOUT levels that allow sensing of supply current Duration of AOUT under threshold to allow supply ...

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TDA7572 Table 13. Voltage booster Symbol Parameters V BST gate high voltage OH_BST V BST gate low voltage OL_BST 4.4.1 Digital to analog converter Table 14. Digital to analog converter Symbol Parameters Dynamic range at -60dBFS Noise floor THD+N at ...

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Electrical specifications 4.4.2 I/O pin characteristics Table 15. I/O pin characteristics Symbol Parameters SCL/CLIP_L pin leakage I SCL/CLIP_L current I SCL/CLIP_L pin sink SCL/CLIP_L V , digital output pins OH V digital output pins OL V INL V INH ADDR0 ...

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TDA7572 4.4.5 Application information These are required parameters of the overall operation of the Cortina IC in its application circuit and will form the overall functional testing for Cortina Table 18. Analog operating characteristics Symbol Parameters THD+Noise Output noise Output ...

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I C and mode control and mode control The Mode1 and Mode0 pins are used to enable TDA7572. These perform the function of bringing the IC out of standby (typically handled by a single standby ...

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TDA7572 The protocol used for the bus is the following and comprises: ● a start condition (S) ● a chip address byte (the LSB bit determines read / write transmission) ● a subaddress byte ● a sequence of data (N-bytes ...

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I C and mode control Read Procedure: Two possible read procedures are possible: 1. without increment: the I bit is set to 0 and the register is addressed by the subaddress sent in the previous write procedure. Only this ...

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TDA7572 5.1 Input control register Subaddress: XXI00001. Table 22. Input control register MSB R/W R/W R AttackSel AttackSel (pin)=1 → [11] (pin)=1 → [11] AttackSel AttackSel (pin)=0 → [10] (pin)=0 → ...

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I C and mode control 5.2 Faults 1 register Subaddress: XXI 00010. Table 23. Faults 1 register MSB R/W1TC R/W1TC R/W1TC 32/ R/W R/W1TC R/W1TC R/W1TC 0 ...

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TDA7572 5.3 Faults 2 register Subaddress: XXI 00011. Table 24. Faults 2 register MSB R/W1TC R/W1TC R/W1TC R/W1TC R/W1TC ...

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I C and mode control 5.4 Control register Subaddress: XXI 00100. Table 25. Control register MSB R/W R/W R/W R ...

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TDA7572 5.5 Modulator register Subaddress: XXI 00101. Table 26. Modulator register MSB R/W R/W R/W R ...

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I C and mode control 5.6 Testing register Subaddress: XXI 00110. Table 27. Testing register MSB R/W R/W R/W R/W 36/64 LSB R/W ...

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TDA7572 6 Input stage and gain compressor 6.1 Input stage The input stage accepts differential analog audio and provides a single ended output that is referenced to SVR, a slowly changing reference signal that is close to V present on ...

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Input stage and gain compressor is clipping during that period. The THD estimate is calculated from the ratio between these times. Clipping means are any of the following conditions occurred: maximum modulation reached, output current limiting active, or voltage clipping ...

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TDA7572 ATTACK[1:0]: Sets the maximum Attack rate of the gain compressor according to the table below: Table 30. Sets the maximum attack rate of the gain compressor Attack [1: Setting in NOI CBUS mode: 2 ...

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Input stage and gain compressor Figure 4. Mute by I Note: when the modulator is set in TRISTATE the mute pin is fast-discharged by the fast-mute internal circuitry. When the modulator is take back out of TRISTATE the preamplifier is ...

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TDA7572 7 Modulator The modulator PWM is the main function of device. Two modulators are provided which are operated independently but configured for bridged mono operations. They are synchronized by virtue of the common clock that drives them and operate ...

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Modulator Table 32. PWMClock table PWMClock [1: Pulse injection is being used with the clocked PWM scheme to prevent missing pulses from an over-modulation condition. The minimum pulse width is dynamically determined by looking at the ...

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TDA7572 consists in a clipping of current when the first threshold for V by sink or source current to the virtual ground of modulator integrator. The cycle-by-cycle limitation is a strong limitation. If the second V about 2µs the half ...

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DAC 8 DAC A one channel DAC is provided. A balance between die area and functionality has been made - the interpolator function required for full bandwidth operation has been off-loaded to an external DSP. This allows Bass-only operation of ...

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TDA7572 In case of Fratio = "11" the configuration is still for full band. The input sample rate for this case is 192kHz (Fs) and the first x4 interpolator has to be implemented off-line in the DSP. For the first ...

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Step-up 9 Step-up A current boost controller is provided to allow high power operation in the 14V automotive environment. This is a clocked PWM, current mode control block that drives an external NFET. Following is present the application circuits. Figure ...

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TDA7572 Figure 11. Threshold of current limiting diagram Vlimhmax, Vlimlmax 440mV AC00023 2 The I C bus register that is set for default to "habilitation" enables the step up. In case of 14V operation or split supply the step-up and ...

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Diagnostics 10 Diagnostics Diagnostics are grouped into two categories, those performed only during standby, and those available during amplifier operation. When Mode[1:0] indicate the I the Faults1 register) to initiate diagnostics. When Mode[1:0]indicate the I determine if the diagnostics should ...

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TDA7572 10.1.2 Die temperature 2 ● I Cbus: The Twarn bit in register Faults2 bus register is set when the first threshold is exceeded. If the second threshold is exceeded the SCR is enabled (only if the PassFETctrl bit is ...

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Diagnostics 10.1.6 Power supply overcurrent 2 ● I Cbus: The bit IsenTrip is set when the voltage between the ISSENP and ISSENM pins exceeds the threshold. Also, the power control SCR is turned on (only if the PassFETctrl register is ...

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TDA7572 Events that put in tri-state the Modulator: – Diagnostic on – Offset detection – Output over-current second threshold trespassed Events that enable the Fault Pin without I – Diagnostic Fault – Junction thermal warning – External thermal warning – ...

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Diagnostics These are instead the thresholds to take into account for the short and open transducers with some example with a predefined current Voltage threshold Itest=14mA Itest=140mA 52/ Normal load - 0.4Ω 1.43Ω ...

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TDA7572 11 Oscillator A common clock is needed to run all switching blocks at one frequency to avoid beating. The internally generated clock is used for the PWM modulators and to run the dc-dc converter. To blur the EMI spectrum, ...

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Under voltage lock out (UVLO) 12 Under voltage lock out (UVLO) The UVLO lock at the voltage references value used to run the device. If some of them are not in the rate band the system is put in tristate ...

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TDA7572 12.3 SVR - UVLO This block monitors the SVR-VSM drop voltage and eventually moves the modulator in tristate. The SVR-UVLO block fixes a limit on the minimum drop. An hysteresis is present for the auto-tristate and expressed in the ...

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Start-up procedures, modulator turn-on after a tristate condition. 13 Start-up procedures, modulator turn-on after a tristate condition. 13.1 Start-up Condition to be respected to turn-on the modulator at the start-up: ● Are MODE0 and/or MODE1 pins at voltage higher than ...

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TDA7572 14 Applications 14.1 Single supply Figure 12. Single supply evaluation board schematic. Applications 57/64 ...

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Applications Figure 13. Single supply evaluation PCB 58/64 Top layer and component layout Bottom layer TDA7572 AC00111 AC00112 ...

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TDA7572 14.2 Split supply Figure 14. Split supply evaluation board schematic. Applications 59/64 ...

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Applications Figure 15. Split supply evaluation PCB 60/64 Top layer and component layout Bottom layer TDA7572 AC00114 AC00115 ...

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TDA7572 14.3 THD+N step-up on The graph below report the THD+N vs. Pout of a TDA7572 board with step-up on and 50Hz input sine wave. Condition and step to made the board working are: 1. connect a voltage supplier to ...

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Package information 15 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the ...

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TDA7572 16 Revision history Table 34. Document revision history Date 3-Sep-2007 Revision 1 Initial release. Revision history Changes 63/64 ...

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