M29W160DB STMicroelectronics, M29W160DB Datasheet

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M29W160DB

Manufacturer Part Number
M29W160DB
Description
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory M29W160DB16 Mbit 2Mb x8 or 1Mb x16, Boot Block 3V Supply Flash Memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of M29W160DB

Case
BGA

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FEATURES SUMMARY
June 2003
SUPPLY VOLTAGE
– V
ACCESS TIME: 70, 90ns
PROGRAMMING TIME
– 10µs per Byte/Word typical
35 MEMORY BLOCKS
– 1 Boot Block (Top or Bottom Location)
– 2 Parameter and 32 Main Blocks
PROGRAM/ERASE CONTROLLER
– Embedded Byte/Word Program algorithms
ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
TEMPORARY BLOCK UNPROTECTION
MODE
COMMON FLASH INTERFACE (only
available for Temperature range 6: –40 to 85°C)
– 64 bit Security Code
LOW POWER CONSUMPTION
– Standby and Automatic Standby
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ELECTRONIC SIGNATURE
– Manufacturer Code: 0020h
– Top Device Code M29W160DT: 22C4h
– Bottom Device Code M29W160DB: 2249h
Read
Erase Suspend
CC
= 2.7V to 3.6V for Program, Erase and
16 Mbit (2Mb x8 or 1Mb x16, Boot Block)
Figure 1. Packages
3V Supply Flash Memory
TFBGA48 (ZA)
TSOP48 (N)
12 x 20mm
SO44 (M)
8 x 9mm
M29W160DB
M29W160DT
FBGA
1/44

Related parts for M29W160DB

M29W160DB Summary of contents

Page 1

... Standby and Automatic Standby 100,000 PROGRAM/ERASE CYCLES per BLOCK ELECTRONIC SIGNATURE – Manufacturer Code: 0020h – Top Device Code M29W160DT: 22C4h – Bottom Device Code M29W160DB: 2249h June 2003 16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory Figure 1. Packages M29W160DT ...

Page 2

... M29W160DT, M29W160DB TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. TSOP Connections Figure 5. TFBGA Connections (Top view through package Figure 6. Block Addresses (x8 Figure 7. Block Addresses (x16 SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Address Inputs (A0-A19 Data Inputs/Outputs (DQ0-DQ7 Data Inputs/Outputs (DQ8-DQ14 Data Input/Output or Address Input (DQ15A-1) ...

Page 3

... Figure 19. TFBGA48 Daisy Chain - Package Connections (Top view through package Figure 20. TFBGA48 Daisy Chain - PCB Connections (Top view through package PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 19. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 M29W160DT, M29W160DB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 30. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 APPENDIX A. BLOCK ADDRESS TABLE Table 21. Top Boot Block Addresses, M29W160DT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 22. Bottom Boot Block Addresses, M29W160DB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 APPENDIX B. COMMON FLASH INTERFACE (CFI Table 23. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 24. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 25. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 26 ...

Page 5

... E G DQ15A– BYTE AI03843B SS NC M29W160DT, M29W160DB Address Inputs Data Inputs/Outputs Data Inputs/Outputs Data Input/Output or Address Input Chip Enable Output Enable Write Enable Reset/Block Temporary Unprotect Ready/Busy Output (not available on SO44 package) Byte/Word Organization Select Supply Voltage Ground Not Connected Internally ...

Page 6

... M29W160DT, M29W160DB Figure 3. SO Connections RP 1 A18 2 A17 M29W160DT M29W160DB DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 22 AI03845 6/44 Figure 4. TSOP Connections A19 A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 33 BYTE DQ15A–1 30 DQ7 29 DQ14 28 DQ6 27 DQ13 26 DQ5 25 DQ12 24 DQ4 ...

Page 7

... Figure 5. TFBGA Connections (Top view through package A17 A18 NC A10 A11 A5 NC A19 DQ0 DQ2 DQ5 DQ7 DQ8 DQ10 DQ12 DQ14 DQ9 DQ11 V CC DQ13 DQ1 DQ3 DQ4 DQ6 M29W160DT, M29W160DB 6 A13 A12 A14 A15 A16 BYTE DQ15 A– AI02985B 7/44 ...

Page 8

... M29W160DT, M29W160DB Figure 6. Block Addresses (x8) M29W160DT Top Boot Block Addresses (x8) 1FFFFFh 16 KByte 1FC000h 1FBFFFh 8 KByte 1FA000h 1F9FFFh 8 KByte 1F8000h 1F7FFFh 32 KByte 1F0000h 1EFFFFh 64 KByte 1E0000h 01FFFFh 64 KByte 010000h 00FFFFh 64 KByte 000000h Note: Also see Appendix A, Tables 21 and 22 for a full listing of the Block Addresses. ...

Page 9

... Note: Also see Appendix A, Tables 21 and 22 for a full listing of the Block Addresses. M29W160DB Bottom Boot Block Addresses (x16) FFFFFh F8000h F7FFFh F0000h 0FFFFh 08000h 07FFFh 04000h 03FFFh Total KWord Blocks 03000h 02FFFh 02000h 01FFFh 00000h M29W160DT, M29W160DB 32 KWord 32 KWord Total KWord Blocks 32 KWord 16 KWord 4 KWord 4 KWord 8 KWord AI05411 9/44 ...

Page 10

... M29W160DT, M29W160DB SIGNAL DESCRIPTIONS See Figure 2, Logic Diagram, and Table 1, Signal Names, for a brief overview of the signals connect this device. Address Inputs (A0-A19). The Address Inputs select the cells in the memory array to access dur- ing Bus Read operations. During Bus Write opera- ...

Page 11

... M29W160DT, M29W160DB , Chip Enable should CC2 ± 0.2V. For the Standby current CC , for Program or Erase operations un- CC3 Data Inputs/Outputs DQ14-DQ8 Hi-Z Data Output Hi-Z Hi C4h (M29W160DT Hi-Z 49h (M29W160DB) ± 0.2V The CC2 DQ7-DQ0 Data Input Hi-Z Hi-Z 20h 11/44 ...

Page 12

... The Device Code can be read using a Bus Read operation with address bits may be set to either V Device Code for the M29W160DT is 22C4h and for the M29W160DB is 2249h. The Block Protection Status of each block can be read using a Bus Read operation with the block. The other address bits may be set to ei- ...

Page 13

... Status Regis- ter. A Read/Reset command must be issued to re- set the error condition and return to Read mode. The Block Erase Command sets all of the bits in the unprotected selected blocks to ’1’. All previous data in the selected blocks is lost. M29W160DT, M29W160DB 13/44 ...

Page 14

... M29W160DT, M29W160DB Erase Suspend Command. The Erase Suspend Command may be used to temporarily suspend a Block Erase operation and return the memory to Read mode. The command requires one Bus Write operation. The Program/Erase Controller will suspend within 15µs of the Erase Suspend Command being is- sued ...

Page 15

... Bus Write Operations 1st 2nd 3rd Addr Data Addr Data F0 AA 2AA 2AA 55 555 AA 2AA 55 555 AA 2AA 55 555 2AA 55 555 AA 2AA 55 555 DQ15 when BYTE M29W160DT, M29W160DB 4th 5th Addr Data Addr Data Addr 555 AA 2AA 55 80 555 AA 2AA 55 6th Data 555 15/44 ...

Page 16

... M29W160DT, M29W160DB Table 5. Commands, 8-bit mode, BYTE = V Command Addr Data 1 X Read/Reset 3 AAA Auto Select 3 AAA Program 4 AAA Unlock Bypass 3 AAA Unlock Bypass 2 X Program Unlock Bypass Reset 2 X Chip Erase 6 AAA Block Erase 6+ AAA Erase Suspend 1 X Erase Resume 1 X Read CFI Query ...

Page 17

... Toggle Bit (DQ6). The Toggle Bit can be used to identify whether the Program/Erase Controller has successfully completed its operation has re- sponded to an Erase Suspend. The Toggle Bit is output on DQ6 when the Status Register is read. M29W160DT, M29W160DB Typical after (1) Min Typ 100k W/E Cycles 29 0 ...

Page 18

... M29W160DT, M29W160DB Bit is set to ’0’ and additional blocks to be erased may be written to the Command Interface. The Erase Timer Bit is output on DQ3 when the Status Register is read. Alternative Toggle Bit (DQ2). The Toggle Bit can be used to monitor the Program/ Erase controller during Erase operations. The Al- ternative Toggle Bit is output on DQ2 when the Status Register is read ...

Page 19

... Operating sections of this specification is not implied. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter (1,2) +2V during transition and for less than 20ns during transitions. CC M29W160DT, M29W160DB START READ DQ5 & DQ6 READ DQ6 DQ6 NO = ...

Page 20

... M29W160DT, M29W160DB DC AND AC PARAMETERS This section summarizes the operating measure- ment conditions, and the DC and AC characteris- tics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the Measurement Table 9. Operating and AC Measurement Conditions Parameter ...

Page 21

... Supply Voltage Note: 1. Sampled only, not 100% tested. Test Condition Min OUT 6MHz ±0.2V ±0.2V CC Program/Erase Controller active –0.5 0. 1.8mA OL µ V –0 –100 11 1.8 M29W160DT, M29W160DB Typ Max Unit µ ±1 A µ ± µ 35 100 12.5 V µ 100 A 2.3 V 21/44 ...

Page 22

... M29W160DT, M29W160DB Figure 12. Read Mode AC Waveforms A0-A19/ A– DQ0-DQ7/ DQ8-DQ15 BYTE tELBL/tELBH Table 12. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC (1) t Chip Enable Low to Output Transition t LZ ELQX t t Chip Enable Low to Output Valid ...

Page 23

... Program/Erase Valid to RB Low t BUSY WHRL High to Chip Enable Low VCHEL VCS CC Note: 1. Sampled only, not 100% tested. tAVAV VALID tAVWL tELWL tGHWL tWLWH tDVWH Parameter M29W160DT, M29W160DB tWLAX tWHEH tWHGL tWHWL tWHDX VALID tWHRL M29W160D 70 Min 70 Min 0 Min 45 Min 45 Min 0 ...

Page 24

... M29W160DT, M29W160DB Figure 14. Write AC Waveforms, Chip Enable Controlled A0-A19/ A– DQ0-DQ7/ DQ8-DQ15 V CC tVCHWL RB Table 14. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Write Enable Low to Chip Enable Low WLEL Chip Enable Low to Chip Enable High ...

Page 25

... RP Pulse Width PLPX RP ( Low to Read Mode t READY PLYH ( Rise Time VIDR PHPHH Note: 1. Sampled only, not 100% tested. tPHWL, tPHEL, tPHGL tPLYH Parameter ID M29W160DT, M29W160DB tRHWL, tRHEL, tRHGL tPHPHH AI02931B M29W160D 70 90 Min 50 50 Min 0 0 Min 500 500 Max 10 10 Min ...

Page 26

... M29W160DT, M29W160DB PACKAGE MECHANICAL Figure 16. SO44 – 44 lead Plastic Small Outline, 525 mils body width, Package Outline Note: Drawing is not to scale. Table 16. SO44 – 44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data Symbol Typ 2.30 b 0. 28. ...

Page 27

... Max 1.200 0.050 0.150 0.950 1.050 0.170 0.270 0.100 0.210 0.080 11.900 12.100 19.800 20.200 18.300 18.500 – – 0.500 0.700 0 5 M29W160DT, M29W160DB inches Typ Min 0.0039 0.0020 0.0394 0.0374 0.0087 0.0067 0.0039 0.4724 0.4685 0.7874 0.7795 0.7244 0.7205 0.0197 – ...

Page 28

... M29W160DT, M29W160DB Figure 18. TFBGA48 – 9mm - 6x8 ball array, 0.80mm pitch, Package Outline BALL "A1" A Table 18. TFBGA48 – 9mm - 6x8 ball array, 0.80mm pitch, Package Mechanical Data Symbol Typ A A1 0.300 A2 b 0.400 D 8.000 D1 4.000 ddd e 0.800 E 9.000 E1 5.600 FD 2.000 FE 1.700 SD 0 ...

Page 29

... Figure 19. TFBGA48 Daisy Chain - Package Connections (Top view through package M29W160DT, M29W160DB 5 6 AI05409 29/44 ...

Page 30

... M29W160DT, M29W160DB Figure 20. TFBGA48 Daisy Chain - PCB Connections (Top view through package) START POINT 30/44 END POINT AI05408 ...

Page 31

... F = Lead-free Package, Tape & Reel Packing Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. M29W160DT, M29W160DB M29W160DB 90 N ...

Page 32

... M29W160DT, M29W160DB Table 20. Daisy Chain Ordering Scheme Example: Device Type M29 Daisy Chain DCL3-16 = Daisy Chain Level 3 for 16 Mbit parts Option Blank = Standard Packing T = Tape & Reel Packing E = Lead-free Package, Standard Packing F = Lead-free Package, Tape & Reel Packing 32/44 M29 DCL3-16 ...

Page 33

... M29W160DT, M29W160DB Address Range Address Range (x8) 1F0000h-1FFFFFh F8000h-FFFFFh 1E0000h-1EFFFFh F0000h-F7FFFh 1D0000h-1DFFFFh E8000h-EFFFFh 1C0000h-1CFFFFh E0000h-E7FFFh 1B0000h-1BFFFFh D8000h-DFFFFh 1A0000h-1AFFFFh D0000h-D7FFFh 190000h-19FFFFh C8000h-CFFFFh 180000h-18FFFFh C0000h-C7FFFh 170000h-17FFFFh B8000h-BFFFFh 160000h-16FFFFh B0000h-B7FFFh ...

Page 34

... M29W160DT, M29W160DB APPENDIX B. COMMON FLASH INTERFACE (CFI) The Common Flash Interface is a JEDEC ap- proved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the mem- ory ...

Page 35

... Typical timeout for minimum size write buffer program = 2 Typical timeout per individual block erase = 2 Typical timeout for full chip erase = 2 Maximum timeout for byte/word program = 2 Maximum timeout for write buffer program = 2 Maximum timeout per individual block erase = 2 Maximum timeout for chip erase = 2 M29W160DT, M29W160DB n µs n µ ...

Page 36

... M29W160DT, M29W160DB Table 26. Device Geometry Definition Address Data x16 x8 27h 4Eh 0015h 28h 50h 0002h 29h 52h 0000h 2Ah 54h 0000h 2Bh 56h 0000h 2Ch 58h 0004h 2Dh 5Ah 0000h 2Eh 5Ch 0000h 2Fh 5Eh 0040h 30h 60h 0000h 31h 62h ...

Page 37

... Block Protect /Unprotect 04 = M29W400B Simultaneous Operations not supported Burst Mode not supported supported Page Mode not supported page word page word Data XXXX XXXX 64 bit: unique device number XXXX XXXX M29W160DT, M29W160DB Description Value "P" "R" "I" "1" "0" Yes 2 1 Yes ...

Page 38

... M29W160DT, M29W160DB APPENDIX C. BLOCK PROTECTION Block protection can be used to prevent any oper- ation from modifying the data stored in the Flash. Each Block can be protected individually. Once protected, Program and Erase operations on the block fail to change the data. There are three techniques that can be used to ...

Page 39

... Figure 21. Programmer Equipment Block Protect Flowchart START ADDRESS = BLOCK ADDRESS Wait 4µ Wait 100µ A0 Wait 4µ Wait 60ns Read DATA DATA NO = 01h YES PASS M29W160DT, M29W160DB ++ YES FAIL AI03469 39/44 ...

Page 40

... M29W160DT, M29W160DB Figure 22. Programmer Equipment Chip Unprotect Flowchart NO = 1000 40/44 START PROTECT ALL BLOCKS CURRENT BLOCK = 0 A6, A12, A15 = Wait 4µ Wait 10ms ADDRESS = CURRENT BLOCK ADDRESS A1 Wait 4µ Wait 60ns Read DATA NO YES DATA = 00h ++n YES FAIL INCREMENT CURRENT BLOCK ...

Page 41

... WRITE 60h ADDRESS = BLOCK ADDRESS WRITE 60h ADDRESS = BLOCK ADDRESS Wait 100µs WRITE 40h ADDRESS = BLOCK ADDRESS Wait 4µs READ DATA ADDRESS = BLOCK ADDRESS DATA NO = 01h YES ISSUE READ/RESET COMMAND PASS ISSUE READ/RESET M29W160DT, M29W160DB ++ YES COMMAND FAIL AI03471 41/44 ...

Page 42

... M29W160DT, M29W160DB Figure 24. In-System Equipment Chip Unprotect Flowchart NO = 1000 ISSUE READ/RESET COMMAND FAIL 42/44 START PROTECT ALL BLOCKS CURRENT BLOCK = WRITE 60h ANY ADDRESS WITH WRITE 60h ANY ADDRESS WITH Wait 10ms WRITE 40h ADDRESS = CURRENT BLOCK ADDRESS Wait 4µs READ DATA ...

Page 43

... Data Toggle Flow chart corrected. Logic diagram corrected. Small text changes. TSOP48 package updated (See Figure 17 and Table 17). Lead-free packing options added to Tables 19 and 20, Ordering Information Scheme and Daisy Chain Ordering Scheme, respectively.. M29W160DT, M29W160DB Revision Details 43/44 ...

Page 44

... M29W160DT, M29W160DB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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