CY7C038V-20AC Cypress Semiconductor Corporation., CY7C038V-20AC Datasheet

no-image

CY7C038V-20AC

Manufacturer Part Number
CY7C038V-20AC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY7C038V-20AC

Case
QFP-100L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C038V-20AC
Manufacturer:
CY
Quantity:
374
Cypress Semiconductor Corporation
Document #: 38-06078 Rev. *A
Features
Notes:
1.
2.
3.
4.
• True Dual-Ported memory cells which allow
• 32K x 16 organization (CY7C027V)
• 64K x 16 organization (CY7C028V)
• 32K x 18 organization (CY7C037V)
• 64K x 18 organization (CY7C038V)
• 0.35-micron CMOS for optimum speed/power
• High-speed access: 15/20/25 ns
• Low operating power
Logic Block Diagram
simultaneous access of the same memory location
— Active: I
— Standby: I
I/O
I/O
A
BUSY is an output in master mode and an input in slave mode.
0
–A
R/W
UB
CE
CE
OE
I/O
I/O
A
A
CE
OE
R/W
SEM
BUSY
INT
UB
LB
8
0
LB
–I/O
–I/O
0L
0L
14
L
L
0L
1L
8/9L
0L
L
L
L
L
L
–A
–A
L
for 32K; A
15
7
L
L
L
–I/O
for x16 devices; I/O
[3]
[3]
L
14/15L
14/15L
for x16 devices; I/O
–I/O
[4]
CC
[2]
7/8L
[1]
SB3
15/17L
= 115 mA (typical)
0
–A
= 10 µA (typical)
15
for 64K devices.
CE
15/16
L
0
8/9
8/9
9
–I/O
–I/O
8
17
for x18 devices.
for x18 devices.
Address
Decode
15/16
3.3V 32K/64K x 16/18 Dual-Port Static RAM
3901 North First Street
Control
I/O
True Dual-Ported
Semaphore
RAM Array
Arbitration
LEAD-FREE
Pb
Interrupt
M/S
• Fully asynchronous operation
• Automatic power-down
• Expandable data bus to 32/36 bits or more using Mas-
• On-chip arbitration logic
• Semaphores included to permit software handshaking
• INT flag for port-to-port communication
• Separate upper-byte and lower-byte control
• Dual Chip Enables
• Pin select for Master or Slave
• Commercial and Industrial temperature ranges
• 100-pin Lead(Pb)-free TQFP and 100-pin TQFP
ter/Slave chip select when using more than one device
between ports
Control
I/O
San Jose
Address
Decode
15/16
,
CA 95134
Revised September 20, 2004
15/16
8/9
8/9
CY7C027V/028V
CY7C037V/038V
CE
R
I/O
8/9L
I/O
A
A
408-943-2600
[4]
0R
0R
–I/O
0L
–A
–A
–I/O
[3]
[3]
BUSY
SEM
R/W
15/17R
14/15R
14/15R
CE
CE
R/W
[1]
INT
UB
LB
OE
OE
CE
UB
LB
[2]
7/8R
0R
1R
R
R
R
R
R
R
R
R
R
R
R
R

Related parts for CY7C038V-20AC

CY7C038V-20AC Summary of contents

Page 1

... CMOS for optimum speed/power • High-speed access: 15/20/25 ns • Low operating power — Active: I ...

Page 2

Pin Configurations 100 99 98 A9L 1 A10L 2 A11L 3 A12L 4 A13L 5 A14L 6 [5] A15L LBL 10 UBL 11 CE0L 12 CE1L 13 SEML 14 VCC 15 R/WL 16 OEL 17 ...

Page 3

... Typical Standby Current for I (Both ports TTL level) SB1 Typical Standby Current for I (Both ports CMOS level) SB3 Note: 6. This pin is NC for CY7C037V. Document #: 38-06078 Rev. *A 100-Pin TQFP (Top View CY7C038V (64K x 18) CY7C037V (32K x 18 CY7C037V/038V -15 15 125 35 10 µA CY7C027V/028V CY7C037V/038V 84 ...

Page 4

Pin Definitions Left Port Right Port R/W R –A A –A 0L 15L 0R 15R I/O –I/O I/O –I/O 0L 17L 0R SEM SEM ...

Page 5

Also, an active busy to a port prevents that port from reading its own mailbox and, thus, resetting the interrupt to it application does not require message passing, do not connect the interrupt pin to the processor’s interrupt ...

Page 6

... Input Capacitance IN C Output Capacitance OUT Notes: 7. Pulse width < 20 ns. 8. Industrial parts are available in CY7C028V and CY7C038V only 1/t = All inputs cycling 1/t (except output enable means no address or control lines change. This applies only to inputs at CMOS level standby I MAX ...

Page 7

AC Test Loads and Waveforms 3. 590Ω OUTPUT 435Ω (a) Normal Load (Load 1) Switching Characteristics Over the Operating Range Parameter Description Read Cycle t Read Cycle Time RC t Address to ...

Page 8

Switching Characteristics Over the Operating Range Parameter Description t Data Hold From Write End HD [14, 15] t R/W LOW to High Z HZWE [14 ,15] t R/W HIGH to Low Z LZWE [41] t Write Pulse to Data Delay ...

Page 9

Switching Waveforms Read Cycle No. 1 (Either Port Address Access) ADDRESS t OHA DATA OUT PREVIOUS DATA VALID Read Cycle No. 2 (Either Port CE/OE Access) CE and DATA OUT I CC CURRENT I SB [20, ...

Page 10

Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [29,30 R/W NOTE 32 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [29,30 R/W DATA IN Notes: 25. ...

Page 11

Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS 0 2 SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A – ...

Page 12

Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 38 LOW. ...

Page 13

Switching Waveforms (continued) Busy Timing Diagram No. 1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No. 2 (Address ...

Page 14

Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE 7FFF (FFFF for CY7C028V/38V R/W L INT R t INS Right Side Clears INT : R ADDRESS R ...

Page 15

Table 1. Non-Contending Read/Write Inputs CE R ...

Page 16

... CY7C037V-20AC CY7C037V-20AXC 25 CY7C037V-25AC CY7C037V-25AXC 64K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C038V-15AC CY7C038V-15AXC 20 CY7C038V-20AC CY7C038V-20AXC CY7C038V-20AI CY7C038V-20AXI 25 CY7C038V-25AC CY7C038V-25AXC Document #: 38-06078 Rev. *A Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack ...

Page 17

Package Diagram 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 100-Pin Lead(Pb)-Free Thin Plastic Quad Flat Pack (TQFP) A100 All product and company information mentioned in this document are trademarks of their respective holders. Document #: 38-06078 Rev. *A © ...

Page 18

... Document History Page Document Title: CY7C027V/CY7C028V/CY7C037V/CY7C038V 3.3V 32K/64K x 16/18 Dual Port Static RAM Document Number: 38-06078 REV. ECN NO. Issue Date ** 237626 6/30/04 *A 259110 See ECN Document #: 38-06078 Rev. *A Orig. of Change YDT Converted data sheet from old spec 38-00670 to conform with new data sheet ...

Related keywords