SAA7128AH NXP Semiconductors, SAA7128AH Datasheet

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SAA7128AH

Manufacturer Part Number
SAA7128AH
Description
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
SAA7128AH
Manufacturer:
PHILIPS
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1 831
Part Number:
SAA7128AH/V1
Manufacturer:
PHI-PBF
Quantity:
6
Product specification
Supersedes data of 2002 Oct 15
DATA SHEET
SAA7128AH; SAA7129AH
Digital video encoder
INTEGRATED CIRCUITS
2003 Dec 09

Related parts for SAA7128AH

SAA7128AH Summary of contents

Page 1

... DATA SHEET SAA7128AH; SAA7129AH Digital video encoder Product specification Supersedes data of 2002 Oct 15 INTEGRATED CIRCUITS 2003 Dec 09 ...

Page 2

... Clock 2 7.9 I C-bus interface 7.10 Input levels and formats 7.11 Bit allocation map 2 7.12 I C-bus format 7.13 Slave receiver 7.14 Slave transmitter 2003 Dec 09 SAA7128AH; SAA7129AH 8 LIMITING VALUES 9 CHARACTERISTICS 9.1 Explanation of RTCI data bits 9.2 Teletext timing 10 APPLICATION INFORMATION 10.1 Digital output signals 11 PACKAGE OUTLINE 12 SOLDERING 12.1 Introduction to soldering surface mount packages 12 ...

Page 3

... C-bus optional Macrovision rev. 7.01 and rev. 6.1 as option; this applies to SAA7128AH only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only. Reverse engineering or ) disassembly is prohibited ...

Page 4

... R load resistance L LE low frequency integral linearity error lf(i) LE low frequency differential linearity error lf(d) T ambient temperature amb 2003 Dec 09 PARAMETER 100 / colour bar at 100 4 Product specification SAA7128AH; SAA7129AH MIN. TYP. MAX. 3.15 3.3 3.45 3.0 3.3 3.6 180 190 40 55 TTL compatible 1.23 37 ...

Page 5

... Acrobat reader. white to force landscape pages to be ... RESET SDA SCL C-BUS SA INTERFACE SAA7128AH SAA7129AH 2 I C-bus control MP pos MP7 to MP0 SWITCH MP neg ...

Page 6

... DAC reference ladder and the oscillator crystal oscillator output crystal oscillator input; if the oscillator is not used, this pin should be connected to ground analog supply voltage 3 for the DAC reference ladder and the oscillator 6 Product specification SAA7128AH; SAA7129AH DESCRIPTION sets the full-scale DAC current SSA ...

Page 7

... C-bus serial data input/output teletext request output, indicating when text bits are requested teletext bit stream input SAA7128AH 6 SAA7129AH Fig.2 Pin configuration. 7 Product specification SAA7128AH; SAA7129AH DESCRIPTION V SSA 33 32 DUMP1 RSET 31 30 CVBS 29 BLUE V DDA1 28 27 VBS 26 GREEN V DDA2 ...

Page 8

... As a further alternative, the VBS and C outputs may provide a second and third CVBS signal also possible to connect a Philips digital video decoder of the SAA711x family to the SAA7128AH; SAA7129AH. Via the RTCI pin, connected to RTCO of a decoder, information concerning actual subcarrier, PAL-ID and definite subcarrier phase can be inserted ...

Page 9

... The resulting output of e.g. ENCODER video PATH recorder e.g. TV RGB PATH MHB576 9 Product specification SAA7128AH; SAA7129AH Configuration 3 is passed directly to the RGB output, assuming B ENCODER FADER BYPASS PATH RGB PATH Fig.6 Configuration 3. Configuration 4 input is in use; its signal appears both composite ...

Page 10

... Behind the succeeding quadrature modulator, colour in a 10-bit resolution is provided on the subcarrier. The numeric ratio between Y and C outputs is in accordance with the respective standards. 10 Product specification SAA7128AH; SAA7129AH ...

Page 11

... ONLY switched into 3-state output condition; this allows for a ‘wired AND’ configuration with other 3-state outputs and can also be used as a power-save mode. 11 Product specification SAA7128AH; SAA7129AH RGB processor and C signals are de-matrixed, individual B R SECAM processor Output interface/DACs ...

Page 12

... In master mode, the line lengths are fixed to 1728 clocks and 1716 clocks at 60 Hz. To allow non-interlaced frames, the field lengths can be varied by 0.5 lines. In the event of non-interlace, the SAA7128AH; SAA7129AH does not provide odd/even information and the output signal does not contain the PAL ‘Bruch sequence’ ...

Page 13

... Philips Semiconductors Digital video encoder 7.10 Input levels and formats The SAA7128AH; SAA7129AH expects digital Y, C and C data with levels (digital codes) in accordance with R “ITU-R BT.601” . For C and CVBS outputs, deviating amplitudes of the colour difference signals can be compensated by independent gain control setting, while gain for luminance is set to predefined values, distinguishable for 7 ...

Page 14

Acrobat reader. white to force landscape pages to be ... 7.11 Bit allocation map Table 3 Slave receiver (slave address 88H) REGISTER FUNCTION SUBADDR ...

Page 15

Acrobat reader. white to force landscape pages to be ... REGISTER FUNCTION SUBADDR Fade factor other 50H 0 Look-up table key colour 2 U ...

Page 16

Acrobat reader. white to force landscape pages to be ... REGISTER FUNCTION SUBADDR Trigger control 6DH HTRIG10 Multi control 6EH SBLBN Closed caption, teletext ...

Page 17

... This bit is reserved and must be set to logic 0. 5 WSS13 Wide screen signalling bits: reserved field. 4 WSS12 3 WSS11 2 WSS10 Wide screen signalling bits: subtitles field. 1 WSS9 0 WSS8 2003 Dec 09 SUBADDRESS ACK DATA 0 DESCRIPTION DESCRIPTION DESCRIPTION 17 Product specification SAA7128AH; SAA7129AH ACK -------- DATA n ACK P ...

Page 18

... Second byte; the MSB of the byte has to carry the CRCC bit, in accordance with the definition of copy generation management system encoding format. 2003 Dec 09 PAL: BS[5: (21H); default value after reset NTSC: BS[5: (19H) PAL: BE[5: (1DH); default value after reset NTSC: BE[5: (1DH) 18 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION ...

Page 19

... GCD[4:0] Gain colour difference of RGB (C (1 application. 2003 Dec 09 DESCRIPTION DESCRIPTION DESCRIPTION , Y and C R DESCRIPTION , Y and Suggested nominal value = 6 (11010b), depending on external Product specification SAA7128AH; SAA7129AH 16 ) output, ranging from ( output, ranging from ...

Page 20

... -to-RGB dematrix is bypassed B R video signal + (1 FADE1) video signal + (1 FADE2) FADE1 = 00H: 100% MPEG, 0% video FADE1 = 3FH: 100% video, 0% MPEG; this is the default value after reset 20 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION MPEG signal DESCRIPTION LUT values DESCRIPTION ...

Page 21

... FADE2 = 00H: 100% LUT colour, 0% video FADE2 = 3FH: 100% video, 0% LUT colour; this is the default value after reset FADE3 = 00H: 100% MPEG, 0% video FADE3 = 3FH: 100% video, 0% MPEG; this is the default value after reset 21 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION ...

Page 22

... B data is sampled on the falling clock edge B data is sampled on the rising clock edge; default state after reset A data is sampled on the falling clock edge A DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 22 Product specification SAA7128AH; SAA7129AH ...

Page 23

... PAL-B/G and data from input ports 3AH = PAL-B/G and data from look-up table 35H = NTSC-M and data from input ports 57H = NTSC-M and data from look-up table nominal to +2.16 nominal to +2.04 23 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION ENCODING nominal nominal DESCRIPTION signal; ...

Page 24

... MSB of the 9-bit code that sets the variable gain for the C real-time control disable subcarrier phase reset bit from RTCI 1 = enable subcarrier phase reset bit from RTCI (see Fig.22) variable blanking level; see Table 39 24 Product specification SAA7128AH; SAA7129AH ENCODING nominal nominal DESCRIPTION signal; see Table 32. B ...

Page 25

... These 2 bits select the cross-colour reduction filter in luminance; see Table 41 and Fig.10. These 6 bits select the variable blanking level during vertical blanking interval is typically identical to value of BLNNL. no cross-colour reduction cross-colour reduction #1 active cross-colour reduction #2 active cross-colour reduction #3 active 25 Product specification SAA7128AH; SAA7129AH (1) ENCODING DESCRIPTION DESCRIPTION ...

Page 26

... SAA7111; for timing see Fig. BSTA[6:0] amplitude of colour burst; input representation in accordance with “ITU-R BT.601” ; see Table 44 2003 Dec 09 SAA7128AH; SAA7129AH DESCRIPTION black 100 IRE; default state after reset black 92.5 IRE including 7.5 IRE set-up of black DESCRIPTION 26 Product specification ...

Page 27

... FSC = 681786290 (28A33BB2H). First byte of captioning data, odd field. LSB of the byte is encoded immediately after run-in and framing code, the MSB of the byte has to carry the parity bit, in accordance with the definition of line 21 encoding format. 27 Product specification SAA7128AH; SAA7129AH ENCODING DESCRIPTION DESCRIPTION ...

Page 28

... Table 49 Subaddress 6AH BIT SYMBOL L21E[17:10] Second byte of extended data, even field. The MSB of the byte has to carry the parity bit, in accordance with the definition of line 21 encoding format. 2003 Dec 09 SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION 28 Product specification ...

Page 29

... TRCV2 = 1) and as an internal blanking signal. RCV1 VS Vertical Sync each field; default state after reset FS Frame Sync (odd/even) FSEQ Field Sequence, vertical sync every fourth field (PAL = 0), eighth field (PAL = 1) or twelfth field (SECAM = 1) not applicable 29 Product specification SAA7128AH; SAA7129AH DESCRIPTION FUNCTION ...

Page 30

... RTCI from SAA7111 if bit RTCE = 1; default value after reset 0 1 reset every two lines or SECAM specific if bit SECAM = reset every eight fields 1 1 reset every four fields 2003 Dec 09 SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 30 Product specification ...

Page 31

... Table 62. Values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed. Leading sync slope at CVBS output coincides with leading slope of RCV2 out at RCV2S = 49H. 2003 Dec 09 LUMINANCE PATH DELAY line = (SCCLN[4: for M-systems line = (SCCLN[4: for other systems LINE 21 ENCODING 31 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION ...

Page 32

... Vertical sync shift between RCV1 and RCV2 (switched to output); in master mode it is possible to shift Hsync (RCV2; CBLF = 0) against Vsync (RCV1; SRCV1 = 00). 1 VS_S1 0 VS_S0 2003 Dec 09 PAL: TTXHS[7:0] = 42H NTSC: TTXHS[7:0] = 54H minimum value: TTXHD[7: standard value: VS_S[2: Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION ...

Page 33

... Table 72. FAL[8: coincides with the first field synchronization pulse. first active line = (FAL[8: for M-systems first active line = (FAL[8: for other systems 33 Product specification SAA7128AH; SAA7129AH PAL: TTXOVS = 05H; NTSC: TTXOVS = 06H PAL: TTXOVE = 16H; NTSC: TTXOVE = 10H PAL: TTXEVS = 04H; ...

Page 34

... LINE bits. Disabled line = LINEnn (50 Hz field rate). This bit mask is effective only, if the lines are enabled by TTXOVS/TTXOVE and TTXEVS/TTXEVE. 2003 Dec 09 last active line = (LAL[8: for M-systems last active line = LAL[8:0] for other systems 34 Product specification SAA7128AH; SAA7129AH DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION ...

Page 35

... FSEQ 1 = during first field of a sequence (repetition rate: NTSC = 4 fields, PAL = 8 fields, SECAM = 12 fields not first field of a sequence 0 O_E 1 = during even field 0 = during odd field 2003 Dec 09 SAA7128AH; SAA7129AH DESCRIPTION 35 Product specification ...

Page 36

... SCBW = 1. (2) SCBW = 0. handbook, halfpage (1) SCBW = 1. (2) SCBW = 0. 2003 Dec 09 ( Fig.8 Chrominance transfer characteristic (dB) 0 (1) ( 0.4 0.8 1.2 Fig.9 Chrominance transfer characteristic 2. 36 Product specification SAA7128AH; SAA7129AH (MHz) MBE735 1.6 f (MHz) MBE737 14 ...

Page 37

... CCRS1 = 1; CCRS0 = 1. (4) CCRS1 = 0; CCRS0 = 0. handbook, halfpage (1) CCRS1 = 0; CCRS0 = 0. 2003 Dec 09 (4) (2) (3) ( Fig.10 Luminance transfer characteristic (dB) ( Fig.11 Luminance transfer characteristic 2. 37 Product specification SAA7128AH; SAA7129AH (MHz) MBE736 6 f (MHz) MGD672 14 ...

Page 38

... G v (dB Fig.13 Colour difference transfer characteristic in RGB. 2003 Dec Fig.12 Luminance transfer characteristic in RGB Product specification SAA7128AH; SAA7129AH (MHz) MGB708 14 f (MHz) MGB706 14 ...

Page 39

... Philips Semiconductors Digital video encoder handbook, full pagewidth (dB 0.2 handbook, full pagewidth 30 (deg 0.2 2003 Dec 09 0.4 0.6 0.8 Fig.14 Gain of SECAM pre-emphasis. 0.4 0.6 0.8 Fig.15 Phase of SECAM pre-emphasis. 39 Product specification SAA7128AH; SAA7129AH 1 1.2 1.4 f (MHz) 1 1.2 1.4 f (MHz) MGB705 1.6 MGB704 1.6 ...

Page 40

... Philips Semiconductors Digital video encoder handbook, full pagewidth (dB 0.2 handbook, full pagewidth 80 (deg 0.2 2003 Dec 09 0.4 0.6 0.8 Fig.16 Gain of SECAM anti-Cloche. 0.4 0.6 0.8 Fig.17 Phase of SECAM anti-Cloche. 40 Product specification SAA7128AH; SAA7129AH 1 1.2 1.4 f (MHz) 1 1.2 1.4 f (MHz) MGB703 1.6 MGB702 1.6 ...

Page 41

... RCV2 input MP input HTRIG = 0 PRCV2 = 0. TRCV2 = 1. ORCV2 = 0. handbook, full pagewidth CVBS output RCV2 output RCV2S = 0. PRCV2 = 0. ORCV2 = 1. 2003 Dec 09 79 LCC 82 LCC Fig.18 Sync and video input timing. 73 LCC Fig.19 Sync and video output timing. 41 Product specification SAA7128AH; SAA7129AH MHB579 MHB580 ...

Page 42

... Condition for maximum voltage at digital inputs or I/O pins: 3.0 V < Class 2 according to EIA/JESD22-114-B. 3. Class B according to EIA/JESD22-115-A. 2003 Dec 09 CONDITIONS outputs in 3-state outputs in 3-state; note 1 and SSA(n) Human body model; note 2 Machine model; note 3 DDD 42 Product specification SAA7128AH; SAA7129AH MIN. MAX. 0.5 +4.6 V 0.5 +4.6 V 0.5 +4 0.5 V DDD ...

Page 43

... HIGH XCLK t rise time r t fall time f Input timing: RCV1, RCV2, MP7 to MP0, RTCI, SA and TTX t input data set-up time SU;DAT t input data hold time HD;DAT 2003 Dec 09 SAA7128AH; SAA7129AH CONDITIONS MIN. 3.15 3.0 note 3.3 V; DDD note 1 0.5 2.0 clocks data I/Os at high-impedance ...

Page 44

... The data is for both input and output direction internal oscillator is used, crystal deviation of nominal frequency is directly proportional to the deviation of subcarrier frequency and line/field frequency. 4. Referring to peak-to-peak analog voltages resulting from identical peak-to-peak digital codes. 2003 Dec 09 SAA7128AH; SAA7129AH CONDITIONS MIN. 3rd harmonic 6 ...

Page 45

... Dec 09 T LLC1 t HIGH SU; DAT t HD; DAT not MP neg valid not valid Fig.20 Clock data timing (0) Y(0) Fig.21 Functional timing. 45 Product specification SAA7128AH; SAA7129AH t r not MP pos valid valid C R (0) Y(1) 2.6 V 1.5 V 0.6 V 2.0 V 0.8 V 2.4 V 0.6 V MHB581 C B (2) MGB699 ...

Page 46

... PHRES = 00), the phase of the subcarrier is reset in each line whenever the reset bit of RTCI input is set to logic the FISE bit is enabled (RTCE = 1; DECFIS = 1), the SAA7128AH; SAA7129AH takes this bit instead of the FISE bit in subaddress 61H. HIGH-to-LOW transition handbook, full pagewidth ...

Page 47

... TTXOVE) plus all suitable lines of the even field (TTXEVS and TTXEVE) can be used for teletext insertion Fig.23 Teletext timing. 47 Product specification SAA7128AH; SAA7129AH is the internally used insertion window for i(TTXW) t i(TTXW MHB504 ...

Page 48

... XTALO 18, 38 SAA7128AH SAA7129AH RSET V DDA1 DUMP1 V DDA2 AGND Fig.24 Application circuit. 48 Product specification SAA7128AH; SAA7129AH 3.3 V analog 0.1 F AGND use one capacitor for each V DDA V DDA1 to V DDA3 25, 28 CVBS 75 AGND AGND 29 BLUE 75 AGND AGND 27 ...

Page 49

... Values for the external series resistors result Table 76 Digital output signals conversion range CVBS SYNC-TIP TO PEAK-CARRIER (digits) 1016 2003 Dec 09 load. CONVERSION RANGE (peak-to-peak) Y (VBS) SYNC-TIP TO WHITE (digits) 881 49 Product specification SAA7128AH; SAA7129AH RGB (Y) BLACK TO WHITE AT GDY = GDC = 6 (digits) 712 ...

Page 50

... 2.5 scale (1) ( 0.4 0.25 10.1 10.1 12.9 0.8 0.2 0.14 9.9 9.9 12.3 REFERENCES JEDEC JEITA 50 SAA7128AH; SAA7129AH detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION Product specification SOT307 (1) ( ...

Page 51

... Dec 09 SAA7128AH; SAA7129AH To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: ...

Page 52

... However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. 9. Hot bar or manual soldering is suitable for PMFP packages. 2003 Dec 09 (1) (3) , TFBGA, (8) 52 Product specification SAA7128AH; SAA7129AH SOLDERING METHOD WAVE REFLOW not suitable suitable (4) not suitable suitable suitable ...

Page 53

... This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). 53 Product specification SAA7128AH; SAA7129AH DESCRIPTION DEFINITION ...

Page 54

... C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 54 Product specification SAA7128AH; SAA7129AH These products are not Philips Semiconductors 2 C patent to use the 2 C specification defined by ...

Page 55

Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited ...

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